Commit c8ccd639 authored by Marek Vasut's avatar Marek Vasut
Browse files

etnaviv: Fix depth stencil ops on GC880/GC2000



This patch fixes depth stencil ops on MX6S GC880 and MX6Q GC2000.
The following dEQPs now pass:
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_depth_funcs.*
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_ops.*
which is roughly 600 fixed dEQP tests.

The problem is that if the front-facing stencil has a value mask 0x00 and
the back-facing stencil has some non-zero value mask, then the stencil part
of the depth stencil buffer is written with 0x00 unconditionally. The blob
replicates the value mask of the back-facing stencil to the value mask of
the front-facing stencil to achieve correct rendering, replicate the same
behavior here.
Signed-off-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner's avatarChristian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <!4275>
parent 5c5c2dd4
Pipeline #137488 passed with stages
in 9 minutes and 34 seconds
......@@ -117,8 +117,8 @@ etna_zsa_state_create(struct pipe_context *pctx,
VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value));
for (unsigned i = 0; i < 2; i++) {
const struct pipe_stencil_state *stencil_front = so->stencil[1].enabled ? &so->stencil[i] : &so->stencil[0];
const struct pipe_stencil_state *stencil_back = so->stencil[1].enabled ? &so->stencil[!i] : &so->stencil[0];
const struct pipe_stencil_state *stencil_front = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[i] : &so->stencil[0];
const struct pipe_stencil_state *stencil_back = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[!i] : &so->stencil[0];
cs->PE_STENCIL_OP[i] =
VIVS_PE_STENCIL_OP_FUNC_FRONT(stencil_front->func) |
VIVS_PE_STENCIL_OP_FUNC_BACK(stencil_back->func) |
......
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