Commit b83c9aca authored by Bas Nieuwenhuizen's avatar Bas Nieuwenhuizen Committed by Marge Bot
Browse files

amd/llvm: Fix divergent descriptor indexing. (v3)

There are multiple LLVM passes that very much move the
intrinsic using the descriptor outside of the loop, defeating
the entire point of creating the loop.

Defeat the optimizer by  splitting the break into a separate
if-statement and putting an optimization barrier on the bool
in between.

v2: Move from a callback based system to begin/end loop.
    This does not make it significantly less intrusive but
    is a bit nicer with all the extra struct and callback
v3: Deal with non-divergent values in divergent path.

Closes: #2160
Fixes: 028ce527

 "radv: Add non-uniform indexing lowering."
Reviewed-by: Samuel Pitoiset's avatarSamuel Pitoiset <>
Tested-by: Marge Bot <!4109>
Part-of: <!4109>
parent ba88e951
Pipeline #119142 passed with stages
in 9 minutes and 42 seconds
This diff is collapsed.
......@@ -2824,13 +2824,13 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
if (nir[i]) {
if (use_aco) {
NIR_PASS_V(nir[i], nir_lower_non_uniform_access,
nir_lower_non_uniform_ubo_access |
nir_lower_non_uniform_ssbo_access |
nir_lower_non_uniform_texture_access |
if (!use_aco)
} else
NIR_PASS_V(nir[i], nir_lower_bool_to_int32);
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment