Commit aca31baa authored by Committed by Marge BotBrowse files
isl: Enable Tigerlake HDC:L1 caches via MOCS in various cases.
Thanks to Felix Degrood for discovering that we missed enabling this additional caching on Tigerlake! Felix also benchmarked the changes. We now use MOCS 48 (HDC:L1 + L3 + LLC) for render targets, textures, and pull constant buffers. We leave storage buffers & images, as well as stateless messages, using the previous MOCS 2 value. We can't use HDC:L1 with atomics, and we don't know a priori whether storage buffers will be used with atomics or not. Similarly, the Vulkan buffer device address feature allows atomics to be performed on buffers via stateless messages, and we only can control MOCS at the base address level, so we can't do much there. This is closer to what the Windows Vulkan and OpenGL drivers do, though it isn't quite the same - they also disable LLC in some cases, but we observed this to have noticable performance regressions when we tried (though a couple titles benefited). We may try experiment with that in the future. Improves performance in a number of titles: - Unreal Engine 4 Shooter Demo [VK]: 11.8% - Witcher 3 [DXVK]: 3.9% - Rise of the Tomb Raider [VK]: 1.5% - Shadow of the Tomb Raider [VK]: 1.0% - Grand Theft Auto V [DXVK]: 0.8% We did not observe any performance regressions. Reviewed-by: Jason Ekstrand <email@example.com> Part-of: <!7104>
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