Commit 9e0e3416 authored by Sagar Ghuge's avatar Sagar Ghuge
Browse files

anv: Fast clear depth/stencil surface in vkCmdClearAttachments



Instead of doing a slow depth clear, we can do depth fast clear in
vkClearAttachments.

v2: (Nanley Chery)
- Clear stencil surface along with depth.
- Check for multilayer resources.
- Lookout for state.attachments.
- Fallback on slow clear for BDW and CHV if conditional rendering
  enabled.
- Keep flush in same function.

v3: (Nanley Chery)
- Return immediately after fast clearing.
- Remove unnecessary comment.

v4: (Nanley Chery)
- Add assertion for BLORP_BATCH_NO_EMIT_DEPTH_STENCIL.
- Remove unnecessary local variable.
- Add 3DSTATE_WM_HZ_OP comment.

v5: (Nanley Chery)
- Fix comments.
- Don't take fast depth clear path if BLORP_BATCH_PREDICATE_ENABLE set.
- Refactor code in can_hiz_clear_att.
Signed-off-by: Sagar Ghuge's avatarSagar Ghuge <sagar.ghuge@intel.com>
parent 95354c11
Pipeline #208522 waiting for manual action with stages
......@@ -1494,6 +1494,53 @@ anv_fast_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | ANV_PIPE_DEPTH_STALL_BIT;
}
static bool
can_hiz_clear_att(struct anv_cmd_buffer *cmd_buffer,
struct blorp_batch *batch,
const VkClearAttachment *attachment,
uint32_t rectCount, const VkClearRect *pRects)
{
/* From Bspec's section MI_PREDICATE:
*
* "The MI_PREDICATE command is used to control the Predicate state bit,
* which in turn can be used to enable/disable the processing of
* 3DPRIMITIVE commands."
*
* Also from BDW/CHV Bspec's 3DSTATE_WM_HZ_OP programming notes:
*
* "This command does NOT support predication from the use of the
* MI_PREDICATE register. To predicate depth clears and resolves on you
* must fall back to using the 3D_PRIMITIVE or GPGPU_WALKER commands."
*
* Since BLORP's predication is currently dependent on MI_PREDICATE, fall
* back to the slow depth clear path when the BLORP_BATCH_PREDICATE_ENABLE
* flag is set.
*/
if (batch->flags & BLORP_BATCH_PREDICATE_ENABLE)
return false;
/* When the BLORP_BATCH_NO_EMIT_DEPTH_STENCIL flag is set, BLORP can only
* clear the first slice of the currently configured depth/stencil view.
*/
assert(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
if (pRects[0].layerCount > 1 || pRects[0].baseArrayLayer > 0 ||
rectCount > 1)
return false;
const struct anv_image_view *iview =
anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
if (!iview)
return false;
VkImageLayout layout =
cmd_buffer->state.subpass->depth_stencil_attachment->layout;
return anv_can_hiz_clear_ds_view(cmd_buffer->device, iview, layout,
attachment->aspectMask,
attachment->clearValue.depthStencil.depth,
pRects->rect);
}
static void
clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer,
struct blorp_batch *batch,
......@@ -1505,6 +1552,18 @@ clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer,
if (!subpass->depth_stencil_attachment)
return;
if (can_hiz_clear_att(cmd_buffer, batch, attachment, rectCount, pRects)) {
const struct anv_image_view *iview =
anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
anv_fast_clear_depth_stencil(cmd_buffer, batch, iview->image,
attachment->aspectMask,
iview->planes[0].isl.base_level,
iview->planes[0].isl.base_array_layer,
pRects[0].layerCount, pRects->rect,
attachment->clearValue.depthStencil.stencil);
return;
}
const uint32_t att_idx = subpass->depth_stencil_attachment->attachment;
assert(att_idx != VK_ATTACHMENT_UNUSED);
struct anv_render_pass_attachment *pass_att =
......
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