Commit 8955d179 authored by Lionel Landwerlin's avatar Lionel Landwerlin Committed by Marge Bot
Browse files

anv: fix MI_PREDICATE_RESULT write



This register is only 32bits.
Signed-off-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1952fd8d

 ("anv: Implement VK_EXT_conditional_rendering for gen 7.5+")
Reviewed-by: Jason Ekstrand's avatarJason Ekstrand <jason@jlekstrand.net>
Part-of: <!9428>
parent 718bfdb3
Pipeline #279956 waiting for manual action with stages
......@@ -4161,7 +4161,7 @@ emit_draw_count_predicate_with_conditional_render(
pred = mi_iand(b, pred, mi_reg64(ANV_PREDICATE_RESULT_REG));
#if GEN_GEN >= 8
mi_store(b, mi_reg64(MI_PREDICATE_RESULT), pred);
mi_store(b, mi_reg32(MI_PREDICATE_RESULT), pred);
#else
/* MI_PREDICATE_RESULT is not whitelisted in i915 command parser
* so we emit MI_PREDICATE to set it.
......
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