Commit 841d7614 authored by Yogesh Mohan Marmithu's avatar Yogesh Mohan Marmithu Committed by Marek Olšák
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radeonsi/gfx11: instruction cache line size is 128 bytes



In gfx11, instruction cache line size is 128 bytes. This patch makes
the neccessary code changes.

v2: instruction store line size is 64 bytes (Marek Olšák)
Signed-off-by: Yogesh Mohan Marmithu's avatarYogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
parent 62879d80
This commit is part of merge request !16328. Comments created here will be created in the context of that merge request.
......@@ -458,8 +458,12 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, struct ac_rtld_open_info i)
else if (i.info->chip_class >= GFX10)
prefetch_distance = 3;
if (prefetch_distance)
binary->rx_size = align(binary->rx_size + prefetch_distance * 64, 64);
if (prefetch_distance) {
if (i.info->chip_class >= GFX11)
binary->rx_size = align(binary->rx_size + prefetch_distance * 64, 128);
else
binary->rx_size = align(binary->rx_size + prefetch_distance * 64, 64);
}
return true;
......
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