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Mesa
mesa
Commits
4a4ff66d
Commit
4a4ff66d
authored
Jan 24, 2017
by
Marek Olšák
1
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radeonsi: also prefetch compute shaders
Reviewed-by:
Nicolai Hähnle
<
nicolai.haehnle@amd.com
>
parent
879c73fa
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src/gallium/drivers/radeonsi/si_compute.c
src/gallium/drivers/radeonsi/si_compute.c
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src/gallium/drivers/radeonsi/si_compute.c
View file @
4a4ff66d
...
...
@@ -372,6 +372,18 @@ static bool si_switch_compute_shader(struct si_context *sctx,
RADEON_PRIO_SCRATCH_BUFFER
);
}
/* Prefetch the compute shader to TC L2.
*
* We should also prefetch graphics shaders if a compute dispatch was
* the last command, and the compute shader if a draw call was the last
* command. However, that would add more complexity and we're likely
* to get a shader state change in that case anyway.
*/
if
(
sctx
->
b
.
chip_class
>=
CIK
)
{
cik_prefetch_TC_L2_async
(
sctx
,
&
program
->
shader
.
bo
->
b
.
b
,
0
,
program
->
shader
.
bo
->
b
.
b
.
width0
);
}
shader_va
=
shader
->
bo
->
gpu_address
+
offset
;
if
(
program
->
use_code_object_v2
)
{
/* Shader code is placed after the amd_kernel_code_t
...
...
Bugzilla Migration User
@bugzilla-migration
mentioned in issue
#1300 (closed)
·
Sep 25, 2019
mentioned in issue
#1300 (closed)
mentioned in issue #1300
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