Commit 0a1d91ef authored by Charmaine Lee's avatar Charmaine Lee Committed by Brian Paul
Browse files

svga: add a few more resource updates HUD query



This patch adds the following HUD queries:
.num-resource-updates  -- number of resource update. Commands include
                          UPDATE_SUBRESOURCE, UPDATE_GB_IMAGE.
.num-buffer-uploads    -- number of buffer uploads.
.num-const-buf-updates -- number of set constant buffer.
.num-const-updates     -- number of set shader constant.
Reviewed-by: Brian Paul's avatarBrian Paul <brianp@vmware.com>
Reviewed-by: default avatarThomas Hellstrom <thellstrom@vmware.com>
parent 79e343b3
......@@ -56,16 +56,20 @@
#define SVGA_QUERY_FLUSH_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 8)
#define SVGA_QUERY_SURFACE_WRITE_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 9)
#define SVGA_QUERY_NUM_READBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 10)
#define SVGA_QUERY_NUM_RESOURCE_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 11)
#define SVGA_QUERY_NUM_BUFFER_UPLOADS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
#define SVGA_QUERY_NUM_CONST_BUF_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 13)
#define SVGA_QUERY_NUM_CONST_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 14)
/* running total counters */
#define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 11)
#define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
#define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 13)
#define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 14)
#define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 15)
#define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 16)
#define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 15)
#define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 16)
#define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 17)
#define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 18)
#define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 19)
#define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 20)
/*SVGA_QUERY_MAX has to be last because it is size of an array*/
#define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 17)
#define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 21)
/**
* Maximum supported number of constant buffers per shader
......@@ -500,21 +504,25 @@ struct svga_context
/** performance / info queries for HUD */
struct {
uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
uint64_t num_state_objects; /**< SVGA_QUERY_NUM_STATE_OBJECTS */
uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACK */
uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
uint64_t num_state_objects; /**< SVGA_QUERY_NUM_STATE_OBJECTS */
uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
} hud;
/** The currently bound stream output targets */
......
......@@ -737,6 +737,10 @@ svga_create_query(struct pipe_context *pipe,
case SVGA_QUERY_NUM_SURFACE_VIEWS:
case SVGA_QUERY_NUM_GENERATE_MIPMAP:
case SVGA_QUERY_NUM_READBACKS:
case SVGA_QUERY_NUM_RESOURCE_UPDATES:
case SVGA_QUERY_NUM_BUFFER_UPLOADS:
case SVGA_QUERY_NUM_CONST_BUF_UPDATES:
case SVGA_QUERY_NUM_CONST_UPDATES:
break;
default:
assert(!"unexpected query type in svga_create_query()");
......@@ -810,6 +814,10 @@ svga_destroy_query(struct pipe_context *pipe, struct pipe_query *q)
case SVGA_QUERY_NUM_SURFACE_VIEWS:
case SVGA_QUERY_NUM_GENERATE_MIPMAP:
case SVGA_QUERY_NUM_READBACKS:
case SVGA_QUERY_NUM_RESOURCE_UPDATES:
case SVGA_QUERY_NUM_BUFFER_UPLOADS:
case SVGA_QUERY_NUM_CONST_BUF_UPDATES:
case SVGA_QUERY_NUM_CONST_UPDATES:
/* nothing */
break;
default:
......@@ -904,6 +912,18 @@ svga_begin_query(struct pipe_context *pipe, struct pipe_query *q)
case SVGA_QUERY_NUM_READBACKS:
sq->begin_count = svga->hud.num_readbacks;
break;
case SVGA_QUERY_NUM_RESOURCE_UPDATES:
sq->begin_count = svga->hud.num_resource_updates;
break;
case SVGA_QUERY_NUM_BUFFER_UPLOADS:
sq->begin_count = svga->hud.num_buffer_uploads;
break;
case SVGA_QUERY_NUM_CONST_BUF_UPDATES:
sq->begin_count = svga->hud.num_const_buf_updates;
break;
case SVGA_QUERY_NUM_CONST_UPDATES:
sq->begin_count = svga->hud.num_const_updates;
break;
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
......@@ -1010,6 +1030,18 @@ svga_end_query(struct pipe_context *pipe, struct pipe_query *q)
case SVGA_QUERY_NUM_READBACKS:
sq->end_count = svga->hud.num_readbacks;
break;
case SVGA_QUERY_NUM_RESOURCE_UPDATES:
sq->end_count = svga->hud.num_resource_updates;
break;
case SVGA_QUERY_NUM_BUFFER_UPLOADS:
sq->end_count = svga->hud.num_buffer_uploads;
break;
case SVGA_QUERY_NUM_CONST_BUF_UPDATES:
sq->end_count = svga->hud.num_const_buf_updates;
break;
case SVGA_QUERY_NUM_CONST_UPDATES:
sq->end_count = svga->hud.num_const_updates;
break;
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
......@@ -1112,6 +1144,10 @@ svga_get_query_result(struct pipe_context *pipe,
case SVGA_QUERY_FLUSH_TIME:
case SVGA_QUERY_SURFACE_WRITE_FLUSHES:
case SVGA_QUERY_NUM_READBACKS:
case SVGA_QUERY_NUM_RESOURCE_UPDATES:
case SVGA_QUERY_NUM_BUFFER_UPLOADS:
case SVGA_QUERY_NUM_CONST_BUF_UPDATES:
case SVGA_QUERY_NUM_CONST_UPDATES:
vresult->u64 = sq->end_count - sq->begin_count;
break;
/* These are running total counters */
......
......@@ -311,6 +311,8 @@ svga_buffer_upload_gb_command(struct svga_context *svga,
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
sbuf->dma.flags.discard = FALSE;
svga->hud.num_resource_updates++;
return PIPE_OK;
}
......@@ -385,6 +387,8 @@ svga_buffer_upload_command(struct svga_context *svga,
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
sbuf->dma.flags.discard = FALSE;
svga->hud.num_buffer_uploads++;
return PIPE_OK;
}
......@@ -433,6 +437,7 @@ svga_buffer_upload_flush(struct svga_context *svga,
assert(box->x + box->w <= sbuf->b.b.width0);
svga->hud.num_bytes_uploaded += box->w;
svga->hud.num_buffer_uploads++;
}
}
else {
......@@ -460,6 +465,7 @@ svga_buffer_upload_flush(struct svga_context *svga,
assert(box->x + box->w <= sbuf->b.b.width0);
svga->hud.num_bytes_uploaded += box->w;
svga->hud.num_buffer_uploads++;
}
}
......
......@@ -683,6 +683,8 @@ svga_texture_transfer_unmap(struct pipe_context *pipe,
ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
}
svga->hud.num_resource_updates++;
assert(ret == PIPE_OK);
(void) ret;
}
......
......@@ -839,6 +839,14 @@ svga_get_driver_query_info(struct pipe_screen *screen,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-readbacks", SVGA_QUERY_NUM_READBACKS,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-resource-updates", SVGA_QUERY_NUM_RESOURCE_UPDATES,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-buffer-uploads", SVGA_QUERY_NUM_BUFFER_UPLOADS,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-const-buf-updates", SVGA_QUERY_NUM_CONST_BUF_UPDATES,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-const-updates", SVGA_QUERY_NUM_CONST_UPDATES,
PIPE_DRIVER_QUERY_TYPE_UINT64),
/* running total counters */
QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
......
......@@ -301,6 +301,8 @@ emit_const(struct svga_context *svga, unsigned shader, unsigned i,
return ret;
memcpy(svga->state.hw_draw.cb[shader][i], value, 4 * sizeof(float));
svga->hud.num_const_updates++;
}
return ret;
......@@ -420,6 +422,9 @@ emit_const_range(struct svga_context *svga,
(j - i) * 4 * sizeof(float));
i = j + 1;
svga->hud.num_const_updates++;
} else {
++i;
}
......@@ -664,6 +669,8 @@ emit_constbuf_vgpu10(struct svga_context *svga, unsigned shader)
pipe_resource_reference(&dst_buffer, NULL);
svga->hud.num_const_buf_updates++;
return ret;
}
......@@ -732,6 +739,8 @@ emit_consts_vgpu10(struct svga_context *svga, unsigned shader)
size);
if (ret != PIPE_OK)
return ret;
svga->hud.num_const_buf_updates++;
}
svga->state.hw_draw.enabled_constbufs[shader] = enabled_constbufs;
......
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