Commit 0354b769 authored by Marek Olšák's avatar Marek Olšák

gallium: remove PIPE_CAP_MAX_COMBINED_SAMPLERS

This can be derived from the shader caps.

All GPUs from ATI/AMD, NVIDIA, and INTEL have separate texture slots
for each shader stage.
parent 82c09142
......@@ -53,8 +53,6 @@ The integer capabilities:
opcodes to the Shader Model 3 specification. XXX oh god this is horrible
* ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
* ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
* ``PIPE_CAP_MAX_COMBINED_SAMPLERS``: The total number of samplers accessible from
the vertex and fragment shader, inclusive.
* ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
masks are supported. If 0, then the first rendertarget's blend mask is
replicated across all MRTs.
......
......@@ -219,8 +219,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return MAX_MIP_LEVELS;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return 9192;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 20;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
......
......@@ -240,13 +240,6 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
return is->debug.lie ? 1 : 0;
/* Texturing. */
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return i915_get_shader_param(screen,
PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS) +
i915_get_shader_param(screen,
PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return I915_MAX_TEXTURE_2D_LEVELS;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
......
......@@ -338,8 +338,6 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap param)
return ILO_MAX_SO_BUFFERS;
case PIPE_CAP_PRIMITIVE_RESTART:
return true;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return ILO_MAX_SAMPLERS * 2;
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
return true;
......
......@@ -106,8 +106,6 @@ static int
llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
{
switch (param) {
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 2 * PIPE_MAX_SAMPLERS; /* VS + FS samplers */
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
return 1;
......
......@@ -60,8 +60,6 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 10;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 13;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 16;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
return 120;
/* supported capabilities */
......
......@@ -85,8 +85,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
switch (param) {
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 64;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return 14;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
......
......@@ -71,8 +71,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
switch (param) {
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 16 * 5;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 15;
......
......@@ -180,8 +180,6 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 0;
/* Texturing. */
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return r300screen->caps.num_tex_units;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
......
......@@ -415,8 +415,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return rscreen->b.info.drm_minor >= 9 ?
(family >= CHIP_CEDAR ? 16384 : 8192) : 0;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 32;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
......
......@@ -306,8 +306,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 15;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return 16384;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return HAVE_LLVM >= 0x0305 ? 48 : 32;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
......
......@@ -66,8 +66,6 @@ static int
softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
{
switch (param) {
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 2 * PIPE_MAX_SAMPLERS; /* VS + FS */
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
return 1;
......
......@@ -139,8 +139,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
SVGA3dDevCapResult result;
switch (param) {
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 16;
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
return 1;
......
......@@ -469,9 +469,6 @@ enum pipe_cap {
PIPE_CAP_SM3 = 29, /*< Shader Model, supported */
PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS = 30,
PIPE_CAP_PRIMITIVE_RESTART = 31,
/** Maximum texture image units accessible from vertex and fragment shaders
* combined */
PIPE_CAP_MAX_COMBINED_SAMPLERS = 32,
/** blend enables and write masks per rendertarget */
PIPE_CAP_INDEP_BLEND_ENABLE = 33,
/** different blend funcs per rendertarget */
......
......@@ -89,10 +89,6 @@ void st_init_limits(struct st_context *st)
c->MaxArrayTextureLayers
= screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS);
c->MaxCombinedTextureImageUnits
= _min(screen->get_param(screen, PIPE_CAP_MAX_COMBINED_SAMPLERS),
MAX_COMBINED_TEXTURE_IMAGE_UNITS);
/* Define max viewport size and max renderbuffer size in terms of
* max texture size (note: max tex RECT size = max tex 2D size).
* If this isn't true for some hardware we'll need new PIPE_CAP_ queries.
......@@ -243,6 +239,12 @@ void st_init_limits(struct st_context *st)
options->LowerClipDistance = true;
}
c->MaxCombinedTextureImageUnits =
_min(c->Program[MESA_SHADER_VERTEX].MaxTextureImageUnits +
c->Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits +
c->Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits,
MAX_COMBINED_TEXTURE_IMAGE_UNITS);
/* This depends on program constants. */
c->MaxTextureCoordUnits
= _min(c->Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits, MAX_TEXTURE_COORD_UNITS);
......
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