i915_screen.c 19.6 KB
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/**************************************************************************
 * 
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 * Copyright 2008 VMware, Inc.
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 * All Rights Reserved.
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 * 
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 * 
 **************************************************************************/


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#include "draw/draw_context.h"
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#include "os/os_misc.h"
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#include "util/u_format.h"
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#include "util/u_format_s3tc.h"
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#include "util/u_inlines.h"
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#include "util/u_memory.h"
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#include "util/u_string.h"
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#include "i915_reg.h"
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#include "i915_debug.h"
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#include "i915_context.h"
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#include "i915_screen.h"
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#include "i915_resource.h"
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#include "i915_winsys.h"
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#include "i915_public.h"
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/*
 * Probe functions
 */
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static const char *
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i915_get_vendor(struct pipe_screen *screen)
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{
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   return "Mesa Project";
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}

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static const char *
i915_get_device_vendor(struct pipe_screen *screen)
{
   return "Intel";
}

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static const char *
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i915_get_name(struct pipe_screen *screen)
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{
   static char buffer[128];
   const char *chipset;

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   switch (i915_screen(screen)->iws->pci_id) {
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   case PCI_CHIP_I915_G:
      chipset = "915G";
      break;
   case PCI_CHIP_I915_GM:
      chipset = "915GM";
      break;
   case PCI_CHIP_I945_G:
      chipset = "945G";
      break;
   case PCI_CHIP_I945_GM:
      chipset = "945GM";
      break;
   case PCI_CHIP_I945_GME:
      chipset = "945GME";
      break;
   case PCI_CHIP_G33_G:
      chipset = "G33";
      break;
   case PCI_CHIP_Q35_G:
      chipset = "Q35";
      break;
   case PCI_CHIP_Q33_G:
      chipset = "Q33";
      break;
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   case PCI_CHIP_PINEVIEW_G:
      chipset = "Pineview G";
      break;
   case PCI_CHIP_PINEVIEW_M:
      chipset = "Pineview M";
      break;
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   default:
      chipset = "unknown";
      break;
   }

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   util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
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   return buffer;
}

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static int
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i915_get_shader_param(struct pipe_screen *screen,
                      enum pipe_shader_type shader,
                      enum pipe_shader_cap cap)
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{
   switch(shader) {
   case PIPE_SHADER_VERTEX:
      switch (cap) {
      case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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      case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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         if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
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            return PIPE_MAX_SAMPLERS;
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         else
            return 0;
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       default:
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         return draw_get_shader_param(shader, cap);
      }
   case PIPE_SHADER_FRAGMENT:
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      /* XXX: some of these are just shader model 2.0 values, fix this! */
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      switch(cap) {
      case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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         return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
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      case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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         return I915_MAX_ALU_INSN;
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      case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
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         return I915_MAX_TEX_INSN;
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      case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
         return 8;
      case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
         return 0;
      case PIPE_SHADER_CAP_MAX_INPUTS:
         return 10;
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      case PIPE_SHADER_CAP_MAX_OUTPUTS:
         return 1;
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
         return 32 * sizeof(float[4]);
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
         return 1;
      case PIPE_SHADER_CAP_MAX_TEMPS:
         return 12; /* XXX: 12 -> 32 ? */
      case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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         return 0;
      case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
         return 1;
      case PIPE_SHADER_CAP_SUBROUTINES:
         return 0;
      case PIPE_SHADER_CAP_INTEGERS:
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      case PIPE_SHADER_CAP_INT64_ATOMICS:
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      case PIPE_SHADER_CAP_FP16:
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         return 0;
      case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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      case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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         return I915_TEX_UNITS;
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      case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
      case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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      case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
      case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
      case PIPE_SHADER_CAP_PREFERRED_IR:
      case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
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         return 0;
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      case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
         return 32;
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      default:
         debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
         return 0;
      }
      break;
   default:
      return 0;
   }

}

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static int
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i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
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{
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   struct i915_screen *is = i915_screen(screen);

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   switch (cap) {
   /* Supported features (boolean caps). */
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   case PIPE_CAP_ANISOTROPIC_FILTER:
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   case PIPE_CAP_NPOT_TEXTURES:
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   case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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   case PIPE_CAP_POINT_SPRITE:
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   case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
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   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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   case PIPE_CAP_TGSI_INSTANCEID:
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   case PIPE_CAP_VERTEX_COLOR_CLAMPED:
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   case PIPE_CAP_USER_VERTEX_BUFFERS:
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   case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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      return 1;
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   /* Unsupported features (boolean caps). */
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   case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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   case PIPE_CAP_DEPTH_CLIP_DISABLE:
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   case PIPE_CAP_INDEP_BLEND_ENABLE:
   case PIPE_CAP_INDEP_BLEND_FUNC:
   case PIPE_CAP_SHADER_STENCIL_EXPORT:
   case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
   case PIPE_CAP_TEXTURE_SWIZZLE:
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   case PIPE_CAP_QUERY_TIME_ELAPSED:
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   case PIPE_CAP_SM3:
   case PIPE_CAP_SEAMLESS_CUBE_MAP:
   case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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   case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
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   case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
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   case PIPE_CAP_CONDITIONAL_RENDER:
   case PIPE_CAP_TEXTURE_BARRIER:
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   case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
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   case PIPE_CAP_START_INSTANCE:
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   case PIPE_CAP_QUERY_TIMESTAMP:
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   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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   case PIPE_CAP_TEXTURE_MULTISAMPLE:
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   case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
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   case PIPE_CAP_CUBE_MAP_ARRAY:
   case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
   case PIPE_CAP_TGSI_TEXCOORD:
   case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
   case PIPE_CAP_TEXTURE_GATHER_SM5:
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   case PIPE_CAP_FAKE_SW_MSAA:
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   case PIPE_CAP_TEXTURE_QUERY_LOD:
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   case PIPE_CAP_SAMPLE_SHADING:
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   case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
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   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
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   case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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   case PIPE_CAP_CLIP_HALFZ:
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   case PIPE_CAP_VERTEXID_NOBASE:
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   case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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   case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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   case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
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   case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
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   case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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   case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
   case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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   case PIPE_CAP_DEPTH_BOUNDS_TEST:
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   case PIPE_CAP_TGSI_TXQS:
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   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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   case PIPE_CAP_SHAREABLE_SHADERS:
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   case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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   case PIPE_CAP_CLEAR_TEXTURE:
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   case PIPE_CAP_DRAW_PARAMETERS:
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   case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
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   case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
   case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
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   case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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   case PIPE_CAP_INVALIDATE_BUFFER:
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   case PIPE_CAP_GENERATE_MIPMAP:
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   case PIPE_CAP_STRING_MARKER:
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   case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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   case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
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   case PIPE_CAP_QUERY_MEMORY_INFO:
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   case PIPE_CAP_PCI_GROUP:
   case PIPE_CAP_PCI_BUS:
   case PIPE_CAP_PCI_DEVICE:
   case PIPE_CAP_PCI_FUNCTION:
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   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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   case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
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   case PIPE_CAP_CULL_DISTANCE:
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   case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
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   case PIPE_CAP_TGSI_VOTE:
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   case PIPE_CAP_MAX_WINDOW_RECTANGLES:
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   case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
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   case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
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   case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
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   case PIPE_CAP_POST_DEPTH_COVERAGE:
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   case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
   case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
   case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
   case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
   case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
   case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
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      return 0;
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   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
   case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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   case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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   case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
   case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
   case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
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   case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
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   case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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   case PIPE_CAP_DRAW_INDIRECT:
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   case PIPE_CAP_MULTI_DRAW_INDIRECT:
   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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   case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
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   case PIPE_CAP_SAMPLER_VIEW_TARGET:
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   case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
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   case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
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   case PIPE_CAP_NATIVE_FENCE_FD:
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   case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
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   case PIPE_CAP_TGSI_FS_FBFETCH:
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   case PIPE_CAP_TGSI_MUL_ZERO_WINS:
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   case PIPE_CAP_DOUBLES:
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   case PIPE_CAP_INT64:
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   case PIPE_CAP_INT64_DIVMOD:
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   case PIPE_CAP_TGSI_TEX_TXF_LZ:
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   case PIPE_CAP_TGSI_CLOCK:
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   case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
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   case PIPE_CAP_TGSI_BALLOT:
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   case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
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   case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
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   case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
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   case PIPE_CAP_BINDLESS_TEXTURE:
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   case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
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   case PIPE_CAP_QUERY_SO_OVERFLOW:
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   case PIPE_CAP_MEMOBJ:
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   case PIPE_CAP_LOAD_CONSTBUF:
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   case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
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   case PIPE_CAP_TILE_RASTER_ORDER:
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   case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
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   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
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   case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
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   case PIPE_CAP_CONTEXT_PRIORITY_MASK:
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   case PIPE_CAP_FENCE_SIGNAL:
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   case PIPE_CAP_CONSTBUF0_FLAGS:
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   case PIPE_CAP_PACKED_UNIFORMS:
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   case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
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      return 0;
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   case PIPE_CAP_MAX_GS_INVOCATIONS:
      return 32;

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   case PIPE_CAP_MAX_VIEWPORTS:
      return 1;

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   case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
      return 64;

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   case PIPE_CAP_GLSL_FEATURE_LEVEL:
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   case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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      return 120;
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   case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
      return 16;

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   /* Features we can lie about (boolean caps). */
   case PIPE_CAP_OCCLUSION_QUERY:
      return is->debug.lie ? 1 : 0;

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   /* Texturing. */
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   case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
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      return I915_MAX_TEXTURE_2D_LEVELS;
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   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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      return I915_MAX_TEXTURE_3D_LEVELS;
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   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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      return I915_MAX_TEXTURE_2D_LEVELS;
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   case PIPE_CAP_MIN_TEXEL_OFFSET:
   case PIPE_CAP_MAX_TEXEL_OFFSET:
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   case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
   case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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   case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
   case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
   case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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      return 0;
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   /* Render targets. */
   case PIPE_CAP_MAX_RENDER_TARGETS:
      return 1;

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   /* Geometry shader output, unsupported. */
   case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
   case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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   case PIPE_CAP_MAX_VERTEX_STREAMS:
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      return 0;

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   case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
      return 2048;

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   /* Fragment coordinate conventions. */
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   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
      return 1;
   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
      return 0;
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   case PIPE_CAP_ENDIANNESS:
      return PIPE_ENDIAN_LITTLE;
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   case PIPE_CAP_VENDOR_ID:
      return 0x8086;
   case PIPE_CAP_DEVICE_ID:
      return is->iws->pci_id;
   case PIPE_CAP_ACCELERATED:
      return 1;
   case PIPE_CAP_VIDEO_MEMORY: {
      /* Once a batch uses more than 75% of the maximum mappable size, we
       * assume that there's some fragmentation, and we start doing extra
       * flushing, etc.  That's the big cliff apps will care about.
       */
      const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
      uint64_t system_memory;

      if (!os_get_total_physical_memory(&system_memory))
         return 0;

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      return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
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   }
   case PIPE_CAP_UMA:
      return 1;

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   case PIPE_CAP_COMPUTE:
   case PIPE_CAP_QUERY_BUFFER_OBJECT:
      return 0;
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   default:
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      debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
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      return 0;
   }
}

static float
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i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
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{
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   switch(cap) {
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   case PIPE_CAPF_MAX_LINE_WIDTH:
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      /* fall-through */
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   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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      return 7.5;

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   case PIPE_CAPF_MAX_POINT_WIDTH:
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      /* fall-through */
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   case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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      return 255.0;

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   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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      return 4.0;

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   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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      return 16.0;

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   case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
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      /* fall-through */
   case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
      /* fall-through */
   case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
      return 0.0f;

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   default:
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      debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
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      return 0;
   }
}

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boolean
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i915_is_format_supported(struct pipe_screen *screen,
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                         enum pipe_format format,
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                         enum pipe_texture_target target,
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                         unsigned sample_count,
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                         unsigned storage_sample_count,
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                         unsigned tex_usage)
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{
   static const enum pipe_format tex_supported[] = {
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      PIPE_FORMAT_B8G8R8A8_UNORM,
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      PIPE_FORMAT_B8G8R8A8_SRGB,
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      PIPE_FORMAT_B8G8R8X8_UNORM,
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      PIPE_FORMAT_R8G8B8A8_UNORM,
      PIPE_FORMAT_R8G8B8X8_UNORM,
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      PIPE_FORMAT_B4G4R4A4_UNORM,
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      PIPE_FORMAT_B5G6R5_UNORM,
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      PIPE_FORMAT_B5G5R5A1_UNORM,
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      PIPE_FORMAT_B10G10R10A2_UNORM,
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      PIPE_FORMAT_L8_UNORM,
      PIPE_FORMAT_A8_UNORM,
      PIPE_FORMAT_I8_UNORM,
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      PIPE_FORMAT_L8A8_UNORM,
      PIPE_FORMAT_UYVY,
      PIPE_FORMAT_YUYV,
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      /* XXX why not?
      PIPE_FORMAT_Z16_UNORM, */
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      PIPE_FORMAT_DXT1_RGB,
      PIPE_FORMAT_DXT1_RGBA,
      PIPE_FORMAT_DXT3_RGBA,
      PIPE_FORMAT_DXT5_RGBA,
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      PIPE_FORMAT_Z24X8_UNORM,
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      PIPE_FORMAT_Z24_UNORM_S8_UINT,
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      PIPE_FORMAT_NONE  /* list terminator */
   };
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   static const enum pipe_format render_supported[] = {
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      PIPE_FORMAT_B8G8R8A8_UNORM,
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      PIPE_FORMAT_B8G8R8X8_UNORM,
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      PIPE_FORMAT_R8G8B8A8_UNORM,
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      PIPE_FORMAT_R8G8B8X8_UNORM,
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      PIPE_FORMAT_B5G6R5_UNORM,
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      PIPE_FORMAT_B5G5R5A1_UNORM,
      PIPE_FORMAT_B4G4R4A4_UNORM,
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      PIPE_FORMAT_B10G10R10A2_UNORM,
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      PIPE_FORMAT_L8_UNORM,
      PIPE_FORMAT_A8_UNORM,
      PIPE_FORMAT_I8_UNORM,
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      PIPE_FORMAT_NONE  /* list terminator */
   };
   static const enum pipe_format depth_supported[] = {
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      /* XXX why not?
      PIPE_FORMAT_Z16_UNORM, */
      PIPE_FORMAT_Z24X8_UNORM,
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      PIPE_FORMAT_Z24_UNORM_S8_UINT,
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      PIPE_FORMAT_NONE  /* list terminator */
   };
   const enum pipe_format *list;
   uint i;

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   if (sample_count > 1)
      return FALSE;

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   if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
      return false;

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   if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
      list = depth_supported;
   else if (tex_usage & PIPE_BIND_RENDER_TARGET)
      list = render_supported;
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   else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
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      list = tex_supported;
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   else
      return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
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   for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
      if (list[i] == format)
         return TRUE;
   }

   return FALSE;
}

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/*
 * Fence functions
 */


static void
i915_fence_reference(struct pipe_screen *screen,
                     struct pipe_fence_handle **ptr,
                     struct pipe_fence_handle *fence)
{
   struct i915_screen *is = i915_screen(screen);

   is->iws->fence_reference(is->iws, ptr, fence);
}

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static boolean
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i915_fence_finish(struct pipe_screen *screen,
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                  struct pipe_context *ctx,
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                  struct pipe_fence_handle *fence,
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                  uint64_t timeout)
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{
   struct i915_screen *is = i915_screen(screen);

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   if (!timeout)
      return is->iws->fence_signalled(is->iws, fence) == 1;

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   return is->iws->fence_finish(is->iws, fence) == 1;
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}


/*
 * Generic functions
 */


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static void
i915_flush_frontbuffer(struct pipe_screen *screen,
                       struct pipe_resource *resource,
                       unsigned level, unsigned layer,
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                       void *winsys_drawable_handle,
                       struct pipe_box *sub_box)
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{
   /* XXX: Dummy right now. */
   (void)screen;
   (void)resource;
   (void)level;
   (void)layer;
   (void)winsys_drawable_handle;
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   (void)sub_box;
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}

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static void
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i915_destroy_screen(struct pipe_screen *screen)
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{
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   struct i915_screen *is = i915_screen(screen);
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   if (is->iws)
      is->iws->destroy(is->iws);
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   FREE(is);
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}

/**
 * Create a new i915_screen object
 */
struct pipe_screen *
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i915_screen_create(struct i915_winsys *iws)
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{
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   struct i915_screen *is = CALLOC_STRUCT(i915_screen);
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   if (!is)
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      return NULL;

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   switch (iws->pci_id) {
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   case PCI_CHIP_I915_G:
   case PCI_CHIP_I915_GM:
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      is->is_i945 = FALSE;
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      break;

   case PCI_CHIP_I945_G:
   case PCI_CHIP_I945_GM:
   case PCI_CHIP_I945_GME:
   case PCI_CHIP_G33_G:
   case PCI_CHIP_Q33_G:
   case PCI_CHIP_Q35_G:
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   case PCI_CHIP_PINEVIEW_G:
   case PCI_CHIP_PINEVIEW_M:
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      is->is_i945 = TRUE;
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      break;

   default:
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      debug_printf("%s: unknown pci id 0x%x, cannot create screen\n", 
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                   __FUNCTION__, iws->pci_id);
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      FREE(is);
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      return NULL;
   }

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   is->iws = iws;
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   is->base.destroy = i915_destroy_screen;
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   is->base.flush_frontbuffer = i915_flush_frontbuffer;
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   is->base.get_name = i915_get_name;
   is->base.get_vendor = i915_get_vendor;
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   is->base.get_device_vendor = i915_get_device_vendor;
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   is->base.get_param = i915_get_param;
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   is->base.get_shader_param = i915_get_shader_param;
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   is->base.get_paramf = i915_get_paramf;
   is->base.is_format_supported = i915_is_format_supported;
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   is->base.context_create = i915_create_context;

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   is->base.fence_reference = i915_fence_reference;
   is->base.fence_finish = i915_fence_finish;

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   i915_init_screen_resource_functions(is);
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   i915_debug_init(is);

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   return &is->base;
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}