svga_screen.c 35.6 KB
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/**********************************************************
 * Copyright 2008-2009 VMware, Inc.  All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person
 * obtaining a copy of this software and associated documentation
 * files (the "Software"), to deal in the Software without
 * restriction, including without limitation the rights to use, copy,
 * modify, merge, publish, distribute, sublicense, and/or sell copies
 * of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be
 * included in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 **********************************************************/

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#include "util/u_format.h"
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#include "util/u_memory.h"
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#include "util/u_inlines.h"
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#include "util/u_string.h"
#include "util/u_math.h"

#include "svga_winsys.h"
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#include "svga_public.h"
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#include "svga_context.h"
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#include "svga_format.h"
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#include "svga_screen.h"
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#include "svga_tgsi.h"
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#include "svga_resource_texture.h"
#include "svga_resource.h"
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#include "svga_debug.h"

#include "svga3d_shaderdefs.h"
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#include "VGPU10ShaderTokens.h"
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/* NOTE: this constant may get moved into a svga3d*.h header file */
#define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
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#ifdef DEBUG
int SVGA_DEBUG = 0;

static const struct debug_named_value svga_debug_flags[] = {
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   { "dma",         DEBUG_DMA, NULL },
   { "tgsi",        DEBUG_TGSI, NULL },
   { "pipe",        DEBUG_PIPE, NULL },
   { "state",       DEBUG_STATE, NULL },
   { "screen",      DEBUG_SCREEN, NULL },
   { "tex",         DEBUG_TEX, NULL },
   { "swtnl",       DEBUG_SWTNL, NULL },
   { "const",       DEBUG_CONSTS, NULL },
   { "viewport",    DEBUG_VIEWPORT, NULL },
   { "views",       DEBUG_VIEWS, NULL },
   { "perf",        DEBUG_PERF, NULL },
   { "flush",       DEBUG_FLUSH, NULL },
   { "sync",        DEBUG_SYNC, NULL },
   { "cache",       DEBUG_CACHE, NULL },
   { "streamout",   DEBUG_STREAMOUT, NULL },
   { "query",       DEBUG_QUERY, NULL },
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   DEBUG_NAMED_VALUE_END
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};
#endif

static const char *
svga_get_vendor( struct pipe_screen *pscreen )
{
   return "VMware, Inc.";
}


static const char *
svga_get_name( struct pipe_screen *pscreen )
{
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   const char *build = "", *llvm = "", *mutex = "";
   static char name[100];
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#ifdef DEBUG
   /* Only return internal details in the DEBUG version:
    */
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   build = "build: DEBUG;";
   mutex = "mutex: " PIPE_ATOMIC ";";
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#elif defined(VMX86_STATS)
   build = "build: OPT;";
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#else
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   build = "build: RELEASE;";
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#endif
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#ifdef HAVE_LLVM
   llvm = "LLVM;";
#endif
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   util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
   return name;
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}


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/** Helper for querying float-valued device cap */
static float
get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
{
   SVGA3dDevCapResult result;
   if (sws->get_cap(sws, cap, &result))
      return result.f;
   else
      return defaultVal;
}


/** Helper for querying uint-valued device cap */
static unsigned
get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
{
   SVGA3dDevCapResult result;
   if (sws->get_cap(sws, cap, &result))
      return result.u;
   else
      return defaultVal;
}


/** Helper for querying boolean-valued device cap */
static boolean
get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
{
   SVGA3dDevCapResult result;
   if (sws->get_cap(sws, cap, &result))
      return result.b;
   else
      return defaultVal;
}
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static float
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svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
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{
   struct svga_screen *svgascreen = svga_screen(screen);
   struct svga_winsys_screen *sws = svgascreen->sws;

   switch (param) {
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   case PIPE_CAPF_MAX_LINE_WIDTH:
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      return svgascreen->maxLineWidth;
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   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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      return svgascreen->maxLineWidthAA;
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   case PIPE_CAPF_MAX_POINT_WIDTH:
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      /* fall-through */
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   case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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      return svgascreen->maxPointSize;
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   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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      return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
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   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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      return 15.0;
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   case PIPE_CAPF_GUARD_BAND_LEFT:
   case PIPE_CAPF_GUARD_BAND_TOP:
   case PIPE_CAPF_GUARD_BAND_RIGHT:
   case PIPE_CAPF_GUARD_BAND_BOTTOM:
      return 0.0;
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   }
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   debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
   return 0;
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}


static int
svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
{
   struct svga_screen *svgascreen = svga_screen(screen);
   struct svga_winsys_screen *sws = svgascreen->sws;
   SVGA3dDevCapResult result;

   switch (param) {
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   case PIPE_CAP_NPOT_TEXTURES:
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   case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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   case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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      return 1;
   case PIPE_CAP_TWO_SIDED_STENCIL:
      return 1;
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   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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      /*
       * "In virtually every OpenGL implementation and hardware,
       * GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
       * http://www.opengl.org/wiki/Blending
       */
      return sws->have_vgpu10 ? 1 : 0;
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   case PIPE_CAP_ANISOTROPIC_FILTER:
      return 1;
   case PIPE_CAP_POINT_SPRITE:
      return 1;
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   case PIPE_CAP_TGSI_TEXCOORD:
      return 0;
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   case PIPE_CAP_MAX_RENDER_TARGETS:
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      return svgascreen->max_color_buffers;
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   case PIPE_CAP_OCCLUSION_QUERY:
      return 1;
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   case PIPE_CAP_QUERY_TIME_ELAPSED:
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      return 0;
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   case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
      return sws->have_vgpu10;
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   case PIPE_CAP_TEXTURE_SHADOW_MAP:
      return 1;
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   case PIPE_CAP_TEXTURE_SWIZZLE:
      return 1;
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   case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
      return 0;
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   case PIPE_CAP_USER_VERTEX_BUFFERS:
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   case PIPE_CAP_USER_INDEX_BUFFERS:
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      return 0;
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   case PIPE_CAP_USER_CONSTANT_BUFFERS:
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      return 1;
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   case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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      return 256;
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   case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
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      {
         unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
         if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
            levels = MIN2(util_logbase2(result.u) + 1, levels);
         else
            levels = 12 /* 2048x2048 */;
         if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
            levels = MIN2(util_logbase2(result.u) + 1, levels);
         else
            levels = 12 /* 2048x2048 */;
         return levels;
      }

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   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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      if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
         return 8;  /* max 128x128x128 */
      return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);

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   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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      /*
       * No mechanism to query the host, and at least limited to 2048x2048 on
       * certain hardware.
       */
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      return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
                  12 /* 2048x2048 */);
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   case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
      return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;

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   case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
      return 1;

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   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
      return 1;
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   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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      return sws->have_vgpu10;
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   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
      return 0;
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   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
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      return !sws->have_vgpu10;
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   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
      return 1; /* The color outputs of vertex shaders are not clamped */
   case PIPE_CAP_VERTEX_COLOR_CLAMPED:
      return 0; /* The driver can't clamp vertex colors */
   case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
      return 0; /* The driver can't clamp fragment colors */

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   case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
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      return 1; /* expected for GL_ARB_framebuffer_object */

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   case PIPE_CAP_GLSL_FEATURE_LEVEL:
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      return sws->have_vgpu10 ? 330 : 120;
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   case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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      return 0;
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   case PIPE_CAP_SM3:
      return 1;

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   case PIPE_CAP_DEPTH_CLIP_DISABLE:
   case PIPE_CAP_INDEP_BLEND_ENABLE:
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   case PIPE_CAP_CONDITIONAL_RENDER:
   case PIPE_CAP_QUERY_TIMESTAMP:
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   case PIPE_CAP_TGSI_INSTANCEID:
   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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   case PIPE_CAP_SEAMLESS_CUBE_MAP:
   case PIPE_CAP_FAKE_SW_MSAA:
      return sws->have_vgpu10;

   case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
      return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
   case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
      return sws->have_vgpu10 ? 4 : 0;
   case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
      return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
   case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
      return 0;
   case PIPE_CAP_TEXTURE_MULTISAMPLE:
      return svgascreen->ms_samples ? 1 : 0;

   case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
      return SVGA3D_DX_MAX_RESOURCE_SIZE;

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   case PIPE_CAP_MIN_TEXEL_OFFSET:
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      return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
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   case PIPE_CAP_MAX_TEXEL_OFFSET:
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      return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;

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   case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
   case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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      return 0;

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   case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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      return sws->have_vgpu10 ? 256 : 0;
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   case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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      return sws->have_vgpu10 ? 1024 : 0;

   case PIPE_CAP_PRIMITIVE_RESTART:
      return 1; /* may be a sw fallback, depending on restart index */

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   case PIPE_CAP_GENERATE_MIPMAP:
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      return sws->have_generate_mipmap_cmd;
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   /* Unsupported features */
   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
   case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
   case PIPE_CAP_SHADER_STENCIL_EXPORT:
   case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
   case PIPE_CAP_INDEP_BLEND_FUNC:
   case PIPE_CAP_TEXTURE_BARRIER:
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   case PIPE_CAP_MAX_VERTEX_STREAMS:
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   case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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   case PIPE_CAP_COMPUTE:
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   case PIPE_CAP_START_INSTANCE:
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   case PIPE_CAP_CUBE_MAP_ARRAY:
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   case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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   case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
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   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
   case PIPE_CAP_TEXTURE_GATHER_SM5:
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   case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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   case PIPE_CAP_TEXTURE_QUERY_LOD:
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   case PIPE_CAP_SAMPLE_SHADING:
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   case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
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   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
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   case PIPE_CAP_DRAW_INDIRECT:
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   case PIPE_CAP_MULTI_DRAW_INDIRECT:
   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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   case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
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   case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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   case PIPE_CAP_SAMPLER_VIEW_TARGET:
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   case PIPE_CAP_CLIP_HALFZ:
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   case PIPE_CAP_VERTEXID_NOBASE:
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   case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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   case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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   case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
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   case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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   case PIPE_CAP_INVALIDATE_BUFFER:
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   case PIPE_CAP_STRING_MARKER:
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   case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
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   case PIPE_CAP_QUERY_MEMORY_INFO:
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   case PIPE_CAP_PCI_GROUP:
   case PIPE_CAP_PCI_BUS:
   case PIPE_CAP_PCI_DEVICE:
   case PIPE_CAP_PCI_FUNCTION:
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   case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
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      return 0;
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   case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
      return 64;
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   case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
   case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
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   case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
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      return 1;  /* need 4-byte alignment for all offsets and strides */
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   case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
      return 2048;
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   case PIPE_CAP_MAX_VIEWPORTS:
      return 1;
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   case PIPE_CAP_ENDIANNESS:
      return PIPE_ENDIAN_LITTLE;
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   case PIPE_CAP_VENDOR_ID:
      return 0x15ad; /* VMware Inc. */
   case PIPE_CAP_DEVICE_ID:
      return 0x0405; /* assume SVGA II */
   case PIPE_CAP_ACCELERATED:
      return 0; /* XXX: */
   case PIPE_CAP_VIDEO_MEMORY:
      /* XXX: Query the host ? */
      return 1;
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   case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
      return sws->have_vgpu10;
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   case PIPE_CAP_UMA:
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   case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
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   case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
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   case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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   case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
   case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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   case PIPE_CAP_DEPTH_BOUNDS_TEST:
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   case PIPE_CAP_TGSI_TXQS:
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   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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   case PIPE_CAP_SHAREABLE_SHADERS:
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   case PIPE_CAP_CLEAR_TEXTURE:
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   case PIPE_CAP_DRAW_PARAMETERS:
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   case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
   case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
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   case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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   case PIPE_CAP_QUERY_BUFFER_OBJECT:
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   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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   case PIPE_CAP_CULL_DISTANCE:
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   case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
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   case PIPE_CAP_TGSI_VOTE:
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   case PIPE_CAP_MAX_WINDOW_RECTANGLES:
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   case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
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   case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
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      return 0;
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   }
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   debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
   return 0;
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}

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static int
vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
                       enum pipe_shader_cap param)
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{
   struct svga_screen *svgascreen = svga_screen(screen);
   struct svga_winsys_screen *sws = svgascreen->sws;
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   unsigned val;

   assert(!sws->have_vgpu10);
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   switch (shader)
   {
   case PIPE_SHADER_FRAGMENT:
      switch (param)
      {
      case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
      case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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         return get_uint_cap(sws,
                             SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS,
                             512);
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      case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
      case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
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         return 512;
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      case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
         return SVGA3D_MAX_NESTING_LEVEL;
      case PIPE_SHADER_CAP_MAX_INPUTS:
         return 10;
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      case PIPE_SHADER_CAP_MAX_OUTPUTS:
         return svgascreen->max_color_buffers;
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
         return 224 * sizeof(float[4]);
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
         return 1;
      case PIPE_SHADER_CAP_MAX_TEMPS:
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         val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
         return MIN2(val, SVGA3D_TEMPREG_MAX);
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      case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
	 /* 
	  * Although PS 3.0 has some addressing abilities it can only represent
	  * loops that can be statically determined and unrolled. Given we can
	  * only handle a subset of the cases that the state tracker already
	  * does it is better to defer loop unrolling to the state tracker.
	  */
         return 0;
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      case PIPE_SHADER_CAP_MAX_PREDS:
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         return 1;
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      case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
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         return 0;
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      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
         return 0;
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      case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
         return 0;
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      case PIPE_SHADER_CAP_SUBROUTINES:
         return 0;
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      case PIPE_SHADER_CAP_INTEGERS:
         return 0;
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      case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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      case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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         return 16;
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      case PIPE_SHADER_CAP_PREFERRED_IR:
         return PIPE_SHADER_IR_TGSI;
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      case PIPE_SHADER_CAP_SUPPORTED_IRS:
         return 0;
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      case PIPE_SHADER_CAP_DOUBLES:
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      case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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      case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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      case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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         return 0;
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      case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
         return 32;
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      }
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      /* If we get here, we failed to handle a cap above */
      debug_printf("Unexpected fragment shader query %u\n", param);
      return 0;
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   case PIPE_SHADER_VERTEX:
      switch (param)
      {
      case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
      case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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         return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
                             512);
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      case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
      case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
         /* XXX: until we have vertex texture support */
         return 0;
      case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
         return SVGA3D_MAX_NESTING_LEVEL;
      case PIPE_SHADER_CAP_MAX_INPUTS:
         return 16;
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      case PIPE_SHADER_CAP_MAX_OUTPUTS:
         return 10;
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
         return 256 * sizeof(float[4]);
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      case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
         return 1;
      case PIPE_SHADER_CAP_MAX_TEMPS:
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         val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
         return MIN2(val, SVGA3D_TEMPREG_MAX);
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      case PIPE_SHADER_CAP_MAX_PREDS:
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         return 1;
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      case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
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         return 0;
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      case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
         return 0;
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      case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
      case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
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         return 1;
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      case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
         return 0;
      case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
         return 1;
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      case PIPE_SHADER_CAP_SUBROUTINES:
         return 0;
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      case PIPE_SHADER_CAP_INTEGERS:
         return 0;
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      case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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      case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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         return 0;
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      case PIPE_SHADER_CAP_PREFERRED_IR:
         return PIPE_SHADER_IR_TGSI;
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      case PIPE_SHADER_CAP_SUPPORTED_IRS:
         return 0;
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      case PIPE_SHADER_CAP_DOUBLES:
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      case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
      case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
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      case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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      case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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      case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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         return 0;
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      case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
         return 32;
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      }
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      /* If we get here, we failed to handle a cap above */
      debug_printf("Unexpected vertex shader query %u\n", param);
      return 0;
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   case PIPE_SHADER_GEOMETRY:
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   case PIPE_SHADER_COMPUTE:
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   case PIPE_SHADER_TESS_CTRL:
   case PIPE_SHADER_TESS_EVAL:
      /* no support for geometry, tess or compute shaders at this time */
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      return 0;
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   default:
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      debug_printf("Unexpected shader type (%u) query\n", shader);
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      return 0;
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   }
   return 0;
}
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static int
vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
                        enum pipe_shader_cap param)
{
   struct svga_screen *svgascreen = svga_screen(screen);
   struct svga_winsys_screen *sws = svgascreen->sws;

   assert(sws->have_vgpu10);
   (void) sws;  /* silence unused var warnings in non-debug builds */

   /* Only VS, GS, FS supported */
   if (shader != PIPE_SHADER_VERTEX &&
       shader != PIPE_SHADER_GEOMETRY &&
       shader != PIPE_SHADER_FRAGMENT) {
      return 0;
   }

   /* NOTE: we do not query the device for any caps/limits at this time */

   /* Generally the same limits for vertex, geometry and fragment shaders */
   switch (param) {
   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
      return 64 * 1024;
   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
      return 64;
   case PIPE_SHADER_CAP_MAX_INPUTS:
      if (shader == PIPE_SHADER_FRAGMENT)
         return VGPU10_MAX_FS_INPUTS;
      else if (shader == PIPE_SHADER_GEOMETRY)
         return VGPU10_MAX_GS_INPUTS;
      else
         return VGPU10_MAX_VS_INPUTS;
   case PIPE_SHADER_CAP_MAX_OUTPUTS:
      if (shader == PIPE_SHADER_FRAGMENT)
         return VGPU10_MAX_FS_OUTPUTS;
      else if (shader == PIPE_SHADER_GEOMETRY)
         return VGPU10_MAX_GS_OUTPUTS;
      else
         return VGPU10_MAX_VS_OUTPUTS;
   case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
      return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
      return svgascreen->max_const_buffers;
   case PIPE_SHADER_CAP_MAX_TEMPS:
      return VGPU10_MAX_TEMPS;
   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
      return TRUE; /* XXX verify */
   case PIPE_SHADER_CAP_MAX_PREDS:
      return 0;
   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
   case PIPE_SHADER_CAP_SUBROUTINES:
   case PIPE_SHADER_CAP_INTEGERS:
      return TRUE;
   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
   case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
      return SVGA3D_DX_MAX_SAMPLERS;
   case PIPE_SHADER_CAP_PREFERRED_IR:
      return PIPE_SHADER_IR_TGSI;
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   case PIPE_SHADER_CAP_SUPPORTED_IRS:
         return 0;
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   case PIPE_SHADER_CAP_DOUBLES:
   case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
   case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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   case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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   case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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      return 0;
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   case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
      return 32;
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   default:
      debug_printf("Unexpected vgpu10 shader query %u\n", param);
      return 0;
   }
   return 0;
}


static int
svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
                      enum pipe_shader_cap param)
{
   struct svga_screen *svgascreen = svga_screen(screen);
   struct svga_winsys_screen *sws = svgascreen->sws;
   if (sws->have_vgpu10) {
      return vgpu10_get_shader_param(screen, shader, param);
   }
   else {
      return vgpu9_get_shader_param(screen, shader, param);
   }
}


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/**
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 * Implement pipe_screen::is_format_supported().
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 * \param bindings  bitmask of PIPE_BIND_x flags
 */
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static boolean
svga_is_format_supported( struct pipe_screen *screen,
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                          enum pipe_format format,
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                          enum pipe_texture_target target,
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                          unsigned sample_count,
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                          unsigned bindings)
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{
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   struct svga_screen *ss = svga_screen(screen);
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   SVGA3dSurfaceFormat svga_format;
   SVGA3dSurfaceFormatCaps caps;
   SVGA3dSurfaceFormatCaps mask;
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   assert(bindings);
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   if (sample_count > 1) {
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      /* In ms_samples, if bit N is set it means that we support
       * multisample with N+1 samples per pixel.
       */
      if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
         return FALSE;
      }
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   }
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   svga_format = svga_translate_format(ss, format, bindings);
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   if (svga_format == SVGA3D_FORMAT_INVALID) {
      return FALSE;
   }

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   /* we don't support sRGB rendering into display targets */
   if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
      return FALSE;
   }

   /*
    * For VGPU10 vertex formats, skip querying host capabilities
    */

   if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
      SVGA3dSurfaceFormat svga_format;
      unsigned flags;
      svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
      return svga_format != SVGA3D_FORMAT_INVALID;
   }

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   /*
    * Override host capabilities, so that we end up with the same
    * visuals for all virtual hardware implementations.
    */

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   if (bindings & PIPE_BIND_DISPLAY_TARGET) {
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      switch (svga_format) {
      case SVGA3D_A8R8G8B8:
      case SVGA3D_X8R8G8B8:
      case SVGA3D_R5G6B5:
         break;
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      /* VGPU10 formats */
      case SVGA3D_B8G8R8A8_UNORM:
      case SVGA3D_B8G8R8X8_UNORM:
      case SVGA3D_B5G6R5_UNORM:
         break;

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      /* Often unsupported/problematic. This means we end up with the same
       * visuals for all virtual hardware implementations.
       */
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      case SVGA3D_A4R4G4B4:
      case SVGA3D_A1R5G5B5:
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         return FALSE;
         
      default:
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         return FALSE;
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      }
   }
   
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   /*
    * Query the host capabilities.
    */

   svga_get_format_cap(ss, svga_format, &caps);

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   if (bindings & PIPE_BIND_RENDER_TARGET) {
      /* Check that the color surface is blendable, unless it's an
       * integer format.
       */
      if (!svga_format_is_integer(svga_format) &&
          (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
         return FALSE;
      }
   }

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   mask.value = 0;
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   if (bindings & PIPE_BIND_RENDER_TARGET) {
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      mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
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   }
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   if (bindings & PIPE_BIND_DEPTH_STENCIL) {
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      mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
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   }
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   if (bindings & PIPE_BIND_SAMPLER_VIEW) {
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      mask.value |= SVGA3DFORMAT_OP_TEXTURE;
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   }

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   if (target == PIPE_TEXTURE_CUBE) {
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      mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
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   }
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   else if (target == PIPE_TEXTURE_3D) {
      mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
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   }

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   return (caps.value & mask.value) == mask.value;
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}


static void
svga_fence_reference(struct pipe_screen *screen,
                     struct pipe_fence_handle **ptr,
                     struct pipe_fence_handle *fence)
{
   struct svga_winsys_screen *sws = svga_screen(screen)->sws;
   sws->fence_reference(sws, ptr, fence);
}


808
static boolean
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svga_fence_finish(struct pipe_screen *screen,
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                  struct pipe_context *ctx,
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                  struct pipe_fence_handle *fence,
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                  uint64_t timeout)
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{
   struct svga_winsys_screen *sws = svga_screen(screen)->sws;
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   boolean retVal;
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   SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
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   if (!timeout) {
      retVal = sws->fence_signalled(sws, fence, 0) == 0;
   }
   else {
      SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
               __FUNCTION__, fence);

      retVal = sws->fence_finish(sws, fence, 0) == 0;
   }

   SVGA_STATS_TIME_POP(sws);
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   return retVal;
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}


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static int
svga_get_driver_query_info(struct pipe_screen *screen,
                           unsigned index,
                           struct pipe_driver_query_info *info)
{
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#define QUERY(NAME, ENUM, UNITS) \
   {NAME, ENUM, {0}, UNITS, PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, 0, 0x0}

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   static const struct pipe_driver_query_info queries[] = {
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      /* per-frame counters */
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      QUERY("num-draw-calls", SVGA_QUERY_NUM_DRAW_CALLS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-fallbacks", SVGA_QUERY_NUM_FALLBACKS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-flushes", SVGA_QUERY_NUM_FLUSHES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-validations", SVGA_QUERY_NUM_VALIDATIONS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME,
            PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
      QUERY("num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
            PIPE_DRIVER_QUERY_TYPE_BYTES),
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      QUERY("command-buffer-size", SVGA_QUERY_COMMAND_BUFFER_SIZE,
            PIPE_DRIVER_QUERY_TYPE_BYTES),
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      QUERY("flush-time", SVGA_QUERY_FLUSH_TIME,
            PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
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      QUERY("surface-write-flushes", SVGA_QUERY_SURFACE_WRITE_FLUSHES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
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      QUERY("num-readbacks", SVGA_QUERY_NUM_READBACKS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
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      QUERY("num-resource-updates", SVGA_QUERY_NUM_RESOURCE_UPDATES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-buffer-uploads", SVGA_QUERY_NUM_BUFFER_UPLOADS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-const-buf-updates", SVGA_QUERY_NUM_CONST_BUF_UPDATES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-const-updates", SVGA_QUERY_NUM_CONST_UPDATES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
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      /* running total counters */
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      QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
            PIPE_DRIVER_QUERY_TYPE_BYTES),
      QUERY("num-shaders", SVGA_QUERY_NUM_SHADERS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-resources", SVGA_QUERY_NUM_RESOURCES,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-state-objects", SVGA_QUERY_NUM_STATE_OBJECTS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
      QUERY("num-surface-views", SVGA_QUERY_NUM_SURFACE_VIEWS,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
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      QUERY("num-generate-mipmap", SVGA_QUERY_NUM_GENERATE_MIPMAP,
            PIPE_DRIVER_QUERY_TYPE_UINT64),
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   };
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#undef QUERY
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   if (!info)
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      return ARRAY_SIZE(queries);
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   if (index >= ARRAY_SIZE(queries))
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      return 0;

   *info = queries[index];
   return 1;
}


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static void
svga_destroy_screen( struct pipe_screen *screen )
{
   struct svga_screen *svgascreen = svga_screen(screen);
   
   svga_screen_cache_cleanup(svgascreen);

   pipe_mutex_destroy(svgascreen->swc_mutex);
   pipe_mutex_destroy(svgascreen->tex_mutex);

   svgascreen->sws->destroy(svgascreen->sws);
   
   FREE(svgascreen);
}


/**
 * Create a new svga_screen object
 */
struct pipe_screen *
svga_screen_create(struct svga_winsys_screen *sws)
{
   struct svga_screen *svgascreen;
   struct pipe_screen *screen;

#ifdef DEBUG
   SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
#endif

   svgascreen = CALLOC_STRUCT(svga_screen);
   if (!svgascreen)
      goto error1;

   svgascreen->debug.force_level_surface_view =
      debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
   svgascreen->debug.force_surface_view =
      debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
   svgascreen->debug.force_sampler_view =
      debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
   svgascreen->debug.no_surface_view =
      debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
   svgascreen->debug.no_sampler_view =
      debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);

   screen = &svgascreen->screen;

   screen->destroy = svga_destroy_screen;
   screen->get_name = svga_get_name;
   screen->get_vendor = svga_get_vendor;
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   screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
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   screen->get_param = svga_get_param;
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   screen->get_shader_param = svga_get_shader_param;
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   screen->get_paramf = svga_get_paramf;
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   screen->get_timestamp = NULL;
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   screen->is_format_supported = svga_is_format_supported;
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   screen->context_create = svga_context_create;
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   screen->fence_reference = svga_fence_reference;
   screen->fence_finish = svga_fence_finish;
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   screen->get_driver_query_info = svga_get_driver_query_info;
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   svgascreen->sws = sws;

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   svga_init_screen_resource_functions(svgascreen);
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