anv_blorp.c 82.8 KB
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/*
 * Copyright © 2016 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

#include "anv_private.h"

static bool
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lookup_blorp_shader(struct blorp_batch *batch,
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                    const void *key, uint32_t key_size,
                    uint32_t *kernel_out, void *prog_data_out)
{
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   struct blorp_context *blorp = batch->blorp;
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   struct anv_device *device = blorp->driver_ctx;

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   /* The default cache must be a real cache */
   assert(device->default_pipeline_cache.cache);
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   struct anv_shader_bin *bin =
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      anv_pipeline_cache_search(&device->default_pipeline_cache, key, key_size);
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   if (!bin)
      return false;

   /* The cache already has a reference and it's not going anywhere so there
    * is no need to hold a second reference.
    */
   anv_shader_bin_unref(device, bin);

   *kernel_out = bin->kernel.offset;
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   *(const struct brw_stage_prog_data **)prog_data_out = bin->prog_data;
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   return true;
}

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static bool
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upload_blorp_shader(struct blorp_batch *batch, uint32_t stage,
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                    const void *key, uint32_t key_size,
                    const void *kernel, uint32_t kernel_size,
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                    const struct brw_stage_prog_data *prog_data,
                    uint32_t prog_data_size,
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                    uint32_t *kernel_out, void *prog_data_out)
{
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   struct blorp_context *blorp = batch->blorp;
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   struct anv_device *device = blorp->driver_ctx;

   /* The blorp cache must be a real cache */
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   assert(device->default_pipeline_cache.cache);
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   struct anv_pipeline_bind_map bind_map = {
      .surface_count = 0,
      .sampler_count = 0,
   };

   struct anv_shader_bin *bin =
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      anv_pipeline_cache_upload_kernel(&device->default_pipeline_cache, stage,
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                                       key, key_size, kernel, kernel_size,
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                                       prog_data, prog_data_size,
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                                       NULL, 0, NULL, &bind_map);
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   if (!bin)
      return false;

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   /* The cache already has a reference and it's not going anywhere so there
    * is no need to hold a second reference.
    */
   anv_shader_bin_unref(device, bin);

   *kernel_out = bin->kernel.offset;
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   *(const struct brw_stage_prog_data **)prog_data_out = bin->prog_data;
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   return true;
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}

void
anv_device_init_blorp(struct anv_device *device)
{
   blorp_init(&device->blorp, device, &device->isl_dev);
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   device->blorp.compiler = device->physical->compiler;
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   device->blorp.lookup_shader = lookup_blorp_shader;
   device->blorp.upload_shader = upload_blorp_shader;
   switch (device->info.gen) {
   case 7:
      if (device->info.is_haswell) {
         device->blorp.exec = gen75_blorp_exec;
      } else {
         device->blorp.exec = gen7_blorp_exec;
      }
      break;
   case 8:
      device->blorp.exec = gen8_blorp_exec;
      break;
   case 9:
      device->blorp.exec = gen9_blorp_exec;
      break;
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   case 11:
      device->blorp.exec = gen11_blorp_exec;
      break;
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   case 12:
      device->blorp.exec = gen12_blorp_exec;
      break;
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   default:
      unreachable("Unknown hardware generation");
   }
}

void
anv_device_finish_blorp(struct anv_device *device)
{
   blorp_finish(&device->blorp);
}
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static void
get_blorp_surf_for_anv_buffer(struct anv_device *device,
                              struct anv_buffer *buffer, uint64_t offset,
                              uint32_t width, uint32_t height,
                              uint32_t row_pitch, enum isl_format format,
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                              bool is_dest,
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                              struct blorp_surf *blorp_surf,
                              struct isl_surf *isl_surf)
{
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   const struct isl_format_layout *fmtl =
      isl_format_get_layout(format);
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   bool ok UNUSED;
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   /* ASTC is the only format which doesn't support linear layouts.
    * Create an equivalently sized surface with ISL to get around this.
    */
   if (fmtl->txc == ISL_TXC_ASTC) {
      /* Use an equivalently sized format */
      format = ISL_FORMAT_R32G32B32A32_UINT;
      assert(fmtl->bpb == isl_format_get_layout(format)->bpb);

      /* Shrink the dimensions for the new format */
      width = DIV_ROUND_UP(width, fmtl->bw);
      height = DIV_ROUND_UP(height, fmtl->bh);
   }

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   *blorp_surf = (struct blorp_surf) {
      .surf = isl_surf,
      .addr = {
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         .buffer = buffer->address.bo,
         .offset = buffer->address.offset + offset,
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         .mocs = anv_mocs(device, buffer->address.bo,
                          is_dest ? ISL_SURF_USAGE_RENDER_TARGET_BIT
                                  : ISL_SURF_USAGE_TEXTURE_BIT),
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      },
   };

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   ok = isl_surf_init(&device->isl_dev, isl_surf,
                     .dim = ISL_SURF_DIM_2D,
                     .format = format,
                     .width = width,
                     .height = height,
                     .depth = 1,
                     .levels = 1,
                     .array_len = 1,
                     .samples = 1,
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                     .row_pitch_B = row_pitch,
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                     .usage = is_dest ? ISL_SURF_USAGE_RENDER_TARGET_BIT
                                      : ISL_SURF_USAGE_TEXTURE_BIT,
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                     .tiling_flags = ISL_TILING_LINEAR_BIT);
   assert(ok);
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}

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/* Pick something high enough that it won't be used in core and low enough it
 * will never map to an extension.
 */
#define ANV_IMAGE_LAYOUT_EXPLICIT_AUX (VkImageLayout)10000000
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static struct blorp_address
anv_to_blorp_address(struct anv_address addr)
{
   return (struct blorp_address) {
      .buffer = addr.bo,
      .offset = addr.offset,
   };
}

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static void
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get_blorp_surf_for_anv_image(const struct anv_device *device,
                             const struct anv_image *image,
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                             VkImageAspectFlags aspect,
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                             VkImageUsageFlags usage,
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                             VkImageLayout layout,
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                             enum isl_aux_usage aux_usage,
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                             struct blorp_surf *blorp_surf)
{
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   uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);

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   if (layout != ANV_IMAGE_LAYOUT_EXPLICIT_AUX) {
      assert(usage != 0);
      aux_usage = anv_layout_to_aux_usage(&device->info, image,
                                          aspect, usage, layout);
   }
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   isl_surf_usage_flags_t mocs_usage =
      (usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) ?
      ISL_SURF_USAGE_RENDER_TARGET_BIT : ISL_SURF_USAGE_TEXTURE_BIT;

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   const struct anv_surface *surface = &image->planes[plane].surface;
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   *blorp_surf = (struct blorp_surf) {
      .surf = &surface->isl,
      .addr = {
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         .buffer = image->planes[plane].address.bo,
         .offset = image->planes[plane].address.offset + surface->offset,
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         .mocs = anv_mocs(device, image->planes[plane].address.bo, mocs_usage),
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      },
   };
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   if (aux_usage != ISL_AUX_USAGE_NONE) {
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      const struct anv_surface *aux_surface = &image->planes[plane].aux_surface;
      blorp_surf->aux_surf = &aux_surface->isl,
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      blorp_surf->aux_addr = (struct blorp_address) {
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         .buffer = image->planes[plane].address.bo,
         .offset = image->planes[plane].address.offset + aux_surface->offset,
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         .mocs = anv_mocs(device, image->planes[plane].address.bo, 0),
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      };
      blorp_surf->aux_usage = aux_usage;
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      /* If we're doing a partial resolve, then we need the indirect clear
       * color.  If we are doing a fast clear and want to store/update the
       * clear color, we also pass the address to blorp, otherwise it will only
       * stomp the CCS to a particular value and won't care about format or
       * clear value
       */
      if (aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
         const struct anv_address clear_color_addr =
            anv_image_get_clear_color_addr(device, image, aspect);
         blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
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      } else if (aspect & VK_IMAGE_ASPECT_DEPTH_BIT) {
         if (device->info.gen >= 10) {
            /* Vulkan always clears to 1.0. On gen < 10, we set that directly
             * in the state packet. For gen >= 10, must provide the clear
             * value in a buffer. We have a single global buffer that stores
             * the 1.0 value.
             */
            const struct anv_address clear_color_addr = (struct anv_address) {
               .bo = device->hiz_clear_bo,
            };
            blorp_surf->clear_color_addr =
               anv_to_blorp_address(clear_color_addr);
         } else {
            blorp_surf->clear_color = (union isl_color_value) {
               .f32 = { ANV_HZ_FC_VAL },
            };
         }
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      }
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   }
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}

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static bool
get_blorp_surf_for_anv_shadow_image(const struct anv_device *device,
                                    const struct anv_image *image,
                                    VkImageAspectFlags aspect,
                                    struct blorp_surf *blorp_surf)
{

   uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
   if (image->planes[plane].shadow_surface.isl.size_B == 0)
      return false;

   *blorp_surf = (struct blorp_surf) {
      .surf = &image->planes[plane].shadow_surface.isl,
      .addr = {
         .buffer = image->planes[plane].address.bo,
         .offset = image->planes[plane].address.offset +
                   image->planes[plane].shadow_surface.offset,
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         .mocs = anv_mocs(device, image->planes[plane].address.bo,
                          ISL_SURF_USAGE_RENDER_TARGET_BIT),
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      },
   };

   return true;
}

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static void
copy_image(struct anv_cmd_buffer *cmd_buffer,
           struct blorp_batch *batch,
           struct anv_image *src_image,
           VkImageLayout src_image_layout,
           struct anv_image *dst_image,
           VkImageLayout dst_image_layout,
           const VkImageCopy2KHR *region)
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{
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   VkOffset3D srcOffset =
      anv_sanitize_image_offset(src_image->type, region->srcOffset);
   VkOffset3D dstOffset =
      anv_sanitize_image_offset(dst_image->type, region->dstOffset);
   VkExtent3D extent =
      anv_sanitize_image_extent(src_image->type, region->extent);

   const uint32_t dst_level = region->dstSubresource.mipLevel;
   unsigned dst_base_layer, layer_count;
   if (dst_image->type == VK_IMAGE_TYPE_3D) {
      dst_base_layer = region->dstOffset.z;
      layer_count = region->extent.depth;
   } else {
      dst_base_layer = region->dstSubresource.baseArrayLayer;
      layer_count =
         anv_get_layerCount(dst_image, &region->dstSubresource);
   }
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   const uint32_t src_level = region->srcSubresource.mipLevel;
   unsigned src_base_layer;
   if (src_image->type == VK_IMAGE_TYPE_3D) {
      src_base_layer = region->srcOffset.z;
   } else {
      src_base_layer = region->srcSubresource.baseArrayLayer;
      assert(layer_count ==
             anv_get_layerCount(src_image, &region->srcSubresource));
   }
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   VkImageAspectFlags src_mask = region->srcSubresource.aspectMask,
      dst_mask = region->dstSubresource.aspectMask;
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   assert(anv_image_aspects_compatible(src_mask, dst_mask));
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   if (util_bitcount(src_mask) > 1) {
      uint32_t aspect_bit;
      anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) {
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         struct blorp_surf src_surf, dst_surf;
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         get_blorp_surf_for_anv_image(cmd_buffer->device,
                                      src_image, 1UL << aspect_bit,
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                                      VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
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                                      src_image_layout, ISL_AUX_USAGE_NONE,
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                                      &src_surf);
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         get_blorp_surf_for_anv_image(cmd_buffer->device,
                                      dst_image, 1UL << aspect_bit,
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                                      VK_IMAGE_USAGE_TRANSFER_DST_BIT,
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                                      dst_image_layout, ISL_AUX_USAGE_NONE,
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                                      &dst_surf);
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         anv_cmd_buffer_mark_image_written(cmd_buffer, dst_image,
                                           1UL << aspect_bit,
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                                           dst_surf.aux_usage, dst_level,
                                           dst_base_layer, layer_count);
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         for (unsigned i = 0; i < layer_count; i++) {
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            blorp_copy(batch, &src_surf, src_level, src_base_layer + i,
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                       &dst_surf, dst_level, dst_base_layer + i,
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                       srcOffset.x, srcOffset.y,
                       dstOffset.x, dstOffset.y,
                       extent.width, extent.height);
         }
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         struct blorp_surf dst_shadow_surf;
         if (get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
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                                                 dst_image,
                                                 1UL << aspect_bit,
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                                                 &dst_shadow_surf)) {
            for (unsigned i = 0; i < layer_count; i++) {
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               blorp_copy(batch, &src_surf, src_level, src_base_layer + i,
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                          &dst_shadow_surf, dst_level, dst_base_layer + i,
                          srcOffset.x, srcOffset.y,
                          dstOffset.x, dstOffset.y,
                          extent.width, extent.height);
            }
         }
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      }
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   } else {
      struct blorp_surf src_surf, dst_surf;
      get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, src_mask,
                                   VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
                                   src_image_layout, ISL_AUX_USAGE_NONE,
                                   &src_surf);
      get_blorp_surf_for_anv_image(cmd_buffer->device, dst_image, dst_mask,
                                   VK_IMAGE_USAGE_TRANSFER_DST_BIT,
                                   dst_image_layout, ISL_AUX_USAGE_NONE,
                                   &dst_surf);
      anv_cmd_buffer_mark_image_written(cmd_buffer, dst_image, dst_mask,
                                        dst_surf.aux_usage, dst_level,
                                        dst_base_layer, layer_count);

      for (unsigned i = 0; i < layer_count; i++) {
         blorp_copy(batch, &src_surf, src_level, src_base_layer + i,
                    &dst_surf, dst_level, dst_base_layer + i,
                    srcOffset.x, srcOffset.y,
                    dstOffset.x, dstOffset.y,
                    extent.width, extent.height);
      }

      struct blorp_surf dst_shadow_surf;
      if (get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
                                              dst_image, dst_mask,
                                              &dst_shadow_surf)) {
         for (unsigned i = 0; i < layer_count; i++) {
            blorp_copy(batch, &src_surf, src_level, src_base_layer + i,
                       &dst_shadow_surf, dst_level, dst_base_layer + i,
                       srcOffset.x, srcOffset.y,
                       dstOffset.x, dstOffset.y,
                       extent.width, extent.height);
         }
      }
   }
}


void anv_CmdCopyImage(
    VkCommandBuffer                             commandBuffer,
    VkImage                                     srcImage,
    VkImageLayout                               srcImageLayout,
    VkImage                                     dstImage,
    VkImageLayout                               dstImageLayout,
    uint32_t                                    regionCount,
    const VkImageCopy*                          pRegions)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, srcImage);
   ANV_FROM_HANDLE(anv_image, dst_image, dstImage);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < regionCount; r++) {
      VkImageCopy2KHR copy = {
         .sType = VK_STRUCTURE_TYPE_IMAGE_COPY_2_KHR,
         .srcSubresource = pRegions[r].srcSubresource,
         .srcOffset      = pRegions[r].srcOffset,
         .dstSubresource = pRegions[r].dstSubresource,
         .dstOffset      = pRegions[r].dstOffset,
         .extent         = pRegions[r].extent,
      };

      copy_image(cmd_buffer, &batch,
                 src_image, srcImageLayout,
                 dst_image, dstImageLayout,
                 &copy);
   }

   blorp_batch_finish(&batch);
}

void anv_CmdCopyImage2KHR(
    VkCommandBuffer                             commandBuffer,
    const VkCopyImageInfo2KHR*                  pCopyImageInfo)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, pCopyImageInfo->srcImage);
   ANV_FROM_HANDLE(anv_image, dst_image, pCopyImageInfo->dstImage);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < pCopyImageInfo->regionCount; r++) {
      copy_image(cmd_buffer, &batch,
                 src_image, pCopyImageInfo->srcImageLayout,
                 dst_image, pCopyImageInfo->dstImageLayout,
                 &pCopyImageInfo->pRegions[r]);
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   }

   blorp_batch_finish(&batch);
}

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static enum isl_format
isl_format_for_size(unsigned size_B)
{
   /* Prefer 32-bit per component formats for CmdFillBuffer */
   switch (size_B) {
   case 1:  return ISL_FORMAT_R8_UINT;
   case 2:  return ISL_FORMAT_R16_UINT;
   case 3:  return ISL_FORMAT_R8G8B8_UINT;
   case 4:  return ISL_FORMAT_R32_UINT;
   case 6:  return ISL_FORMAT_R16G16B16_UINT;
   case 8:  return ISL_FORMAT_R32G32_UINT;
   case 12: return ISL_FORMAT_R32G32B32_UINT;
   case 16: return ISL_FORMAT_R32G32B32A32_UINT;
   default:
      unreachable("Unknown format size");
   }
}

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static void
copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer,
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                     struct blorp_batch *batch,
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                     struct anv_buffer *anv_buffer,
                     struct anv_image *anv_image,
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                     VkImageLayout image_layout,
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                     const VkBufferImageCopy2KHR* region,
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                     bool buffer_to_image)
{
   struct {
      struct blorp_surf surf;
      uint32_t level;
      VkOffset3D offset;
   } image, buffer, *src, *dst;

   buffer.level = 0;
   buffer.offset = (VkOffset3D) { 0, 0, 0 };

   if (buffer_to_image) {
      src = &buffer;
      dst = &image;
   } else {
      src = &image;
      dst = &buffer;
   }

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   const VkImageAspectFlags aspect = region->imageSubresource.aspectMask;

   get_blorp_surf_for_anv_image(cmd_buffer->device, anv_image, aspect,
                                buffer_to_image ?
                                VK_IMAGE_USAGE_TRANSFER_DST_BIT :
                                VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
                                image_layout, ISL_AUX_USAGE_NONE,
                                &image.surf);
   image.offset =
      anv_sanitize_image_offset(anv_image->type, region->imageOffset);
   image.level = region->imageSubresource.mipLevel;

   VkExtent3D extent =
      anv_sanitize_image_extent(anv_image->type, region->imageExtent);
   if (anv_image->type != VK_IMAGE_TYPE_3D) {
      image.offset.z = region->imageSubresource.baseArrayLayer;
      extent.depth =
         anv_get_layerCount(anv_image, &region->imageSubresource);
   }
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   const enum isl_format linear_format =
      anv_get_isl_format(&cmd_buffer->device->info, anv_image->vk_format,
                         aspect, VK_IMAGE_TILING_LINEAR);
   const struct isl_format_layout *linear_fmtl =
      isl_format_get_layout(linear_format);
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   const uint32_t buffer_row_length =
      region->bufferRowLength ?
      region->bufferRowLength : extent.width;
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   const uint32_t buffer_image_height =
      region->bufferImageHeight ?
      region->bufferImageHeight : extent.height;
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   const uint32_t buffer_row_pitch =
      DIV_ROUND_UP(buffer_row_length, linear_fmtl->bw) *
      (linear_fmtl->bpb / 8);
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   const uint32_t buffer_layer_stride =
      DIV_ROUND_UP(buffer_image_height, linear_fmtl->bh) *
      buffer_row_pitch;
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   /* Some formats have additional restrictions which may cause ISL to
    * fail to create a surface for us.  Some examples include:
    *
    *    1. ASTC formats are not allowed to be LINEAR and must be tiled
    *    2. YCbCr formats have to have 2-pixel aligned strides
    *
    * To avoid these issues, we always bind the buffer as if it's a
    * "normal" format like RGBA32_UINT.  Since we're using blorp_copy,
    * the format doesn't matter as long as it has the right bpb.
    */
   const VkExtent2D buffer_extent = {
      .width = DIV_ROUND_UP(extent.width, linear_fmtl->bw),
      .height = DIV_ROUND_UP(extent.height, linear_fmtl->bh),
   };
   const enum isl_format buffer_format =
      isl_format_for_size(linear_fmtl->bpb / 8);

   struct isl_surf buffer_isl_surf;
   get_blorp_surf_for_anv_buffer(cmd_buffer->device,
                                 anv_buffer, region->bufferOffset,
                                 buffer_extent.width, buffer_extent.height,
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                                 buffer_row_pitch, buffer_format, false,
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                                 &buffer.surf, &buffer_isl_surf);

   bool dst_has_shadow = false;
   struct blorp_surf dst_shadow_surf;
   if (&image == dst) {
      /* In this case, the source is the buffer and, since blorp takes its
       * copy dimensions in terms of the source format, we have to use the
       * scaled down version for compressed textures because the source
       * format is an RGB format.
       */
      extent.width = buffer_extent.width;
      extent.height = buffer_extent.height;

      anv_cmd_buffer_mark_image_written(cmd_buffer, anv_image,
                                        aspect, dst->surf.aux_usage,
                                        dst->level,
                                        dst->offset.z, extent.depth);

      dst_has_shadow =
         get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
                                             anv_image, aspect,
                                             &dst_shadow_surf);
   }
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   for (unsigned z = 0; z < extent.depth; z++) {
      blorp_copy(batch, &src->surf, src->level, src->offset.z,
                 &dst->surf, dst->level, dst->offset.z,
                 src->offset.x, src->offset.y, dst->offset.x, dst->offset.y,
                 extent.width, extent.height);

      if (dst_has_shadow) {
         blorp_copy(batch, &src->surf, src->level, src->offset.z,
                    &dst_shadow_surf, dst->level, dst->offset.z,
                    src->offset.x, src->offset.y,
                    dst->offset.x, dst->offset.y,
                    extent.width, extent.height);
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      }

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      image.offset.z++;
      buffer.surf.addr.offset += buffer_layer_stride;
   }
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}

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void anv_CmdCopyBufferToImage(
    VkCommandBuffer                             commandBuffer,
    VkBuffer                                    srcBuffer,
    VkImage                                     dstImage,
    VkImageLayout                               dstImageLayout,
    uint32_t                                    regionCount,
    const VkBufferImageCopy*                    pRegions)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer);
   ANV_FROM_HANDLE(anv_image, dst_image, dstImage);

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   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < regionCount; r++) {
      VkBufferImageCopy2KHR copy = {
         .sType = VK_STRUCTURE_TYPE_BUFFER_IMAGE_COPY_2_KHR,
         .bufferOffset      = pRegions[r].bufferOffset,
         .bufferRowLength   = pRegions[r].bufferRowLength,
         .bufferImageHeight = pRegions[r].bufferImageHeight,
         .imageSubresource  = pRegions[r].imageSubresource,
         .imageOffset       = pRegions[r].imageOffset,
         .imageExtent       = pRegions[r].imageExtent,
      };

      copy_buffer_to_image(cmd_buffer, &batch, src_buffer, dst_image,
                           dstImageLayout, &copy, true);
   }

   blorp_batch_finish(&batch);
}

void anv_CmdCopyBufferToImage2KHR(
    VkCommandBuffer                             commandBuffer,
    const VkCopyBufferToImageInfo2KHR*          pCopyBufferToImageInfo)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, src_buffer, pCopyBufferToImageInfo->srcBuffer);
   ANV_FROM_HANDLE(anv_image, dst_image, pCopyBufferToImageInfo->dstImage);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < pCopyBufferToImageInfo->regionCount; r++) {
      copy_buffer_to_image(cmd_buffer, &batch, src_buffer, dst_image,
                           pCopyBufferToImageInfo->dstImageLayout,
                           &pCopyBufferToImageInfo->pRegions[r], true);
   }

   blorp_batch_finish(&batch);
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}

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void anv_CmdCopyImageToBuffer(
    VkCommandBuffer                             commandBuffer,
    VkImage                                     srcImage,
    VkImageLayout                               srcImageLayout,
    VkBuffer                                    dstBuffer,
    uint32_t                                    regionCount,
    const VkBufferImageCopy*                    pRegions)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, srcImage);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);

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   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < regionCount; r++) {
      VkBufferImageCopy2KHR copy = {
         .sType = VK_STRUCTURE_TYPE_BUFFER_IMAGE_COPY_2_KHR,
         .bufferOffset      = pRegions[r].bufferOffset,
         .bufferRowLength   = pRegions[r].bufferRowLength,
         .bufferImageHeight = pRegions[r].bufferImageHeight,
         .imageSubresource  = pRegions[r].imageSubresource,
         .imageOffset       = pRegions[r].imageOffset,
         .imageExtent       = pRegions[r].imageExtent,
      };

      copy_buffer_to_image(cmd_buffer, &batch, dst_buffer, src_image,
                           srcImageLayout, &copy, false);
   }

   blorp_batch_finish(&batch);

   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
}

void anv_CmdCopyImageToBuffer2KHR(
    VkCommandBuffer                             commandBuffer,
    const VkCopyImageToBufferInfo2KHR*          pCopyImageToBufferInfo)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, pCopyImageToBufferInfo->srcImage);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, pCopyImageToBufferInfo->dstBuffer);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < pCopyImageToBufferInfo->regionCount; r++) {
      copy_buffer_to_image(cmd_buffer, &batch, dst_buffer, src_image,
                           pCopyImageToBufferInfo->srcImageLayout,
                           &pCopyImageToBufferInfo->pRegions[r], false);
   }

   blorp_batch_finish(&batch);
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   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
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}

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static bool
flip_coords(unsigned *src0, unsigned *src1, unsigned *dst0, unsigned *dst1)
{
   bool flip = false;
   if (*src0 > *src1) {
      unsigned tmp = *src0;
      *src0 = *src1;
      *src1 = tmp;
      flip = !flip;
   }

   if (*dst0 > *dst1) {
      unsigned tmp = *dst0;
      *dst0 = *dst1;
      *dst1 = tmp;
      flip = !flip;
   }

   return flip;
}

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static void
blit_image(struct anv_cmd_buffer *cmd_buffer,
           struct blorp_batch *batch,
           struct anv_image *src_image,
           VkImageLayout src_image_layout,
           struct anv_image *dst_image,
           VkImageLayout dst_image_layout,
           const VkImageBlit2KHR *region,
           VkFilter filter)
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{
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   const VkImageSubresourceLayers *src_res = &region->srcSubresource;
   const VkImageSubresourceLayers *dst_res = &region->dstSubresource;
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   struct blorp_surf src, dst;

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   enum blorp_filter blorp_filter;
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   switch (filter) {
   case VK_FILTER_NEAREST:
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      blorp_filter = BLORP_FILTER_NEAREST;
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      break;
   case VK_FILTER_LINEAR:
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      blorp_filter = BLORP_FILTER_BILINEAR;
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      break;
   default:
      unreachable("Invalid filter");
   }

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   assert(anv_image_aspects_compatible(src_res->aspectMask,
                                       dst_res->aspectMask));
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   uint32_t aspect_bit;
   anv_foreach_image_aspect_bit(aspect_bit, src_image, src_res->aspectMask) {
      get_blorp_surf_for_anv_image(cmd_buffer->device,
                                   src_image, 1U << aspect_bit,
                                   VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
                                   src_image_layout, ISL_AUX_USAGE_NONE, &src);
      get_blorp_surf_for_anv_image(cmd_buffer->device,
                                   dst_image, 1U << aspect_bit,
                                   VK_IMAGE_USAGE_TRANSFER_DST_BIT,
                                   dst_image_layout, ISL_AUX_USAGE_NONE, &dst);
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      struct anv_format_plane src_format =
         anv_get_format_plane(&cmd_buffer->device->info, src_image->vk_format,
                              1U << aspect_bit, src_image->tiling);
      struct anv_format_plane dst_format =
         anv_get_format_plane(&cmd_buffer->device->info, dst_image->vk_format,
                              1U << aspect_bit, dst_image->tiling);
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      unsigned dst_start, dst_end;
      if (dst_image->type == VK_IMAGE_TYPE_3D) {
         assert(dst_res->baseArrayLayer == 0);
         dst_start = region->dstOffsets[0].z;
         dst_end = region->dstOffsets[1].z;
      } else {
         dst_start = dst_res->baseArrayLayer;
         dst_end = dst_start + anv_get_layerCount(dst_image, dst_res);
      }
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      unsigned src_start, src_end;
      if (src_image->type == VK_IMAGE_TYPE_3D) {
         assert(src_res->baseArrayLayer == 0);
         src_start = region->srcOffsets[0].z;
         src_end = region->srcOffsets[1].z;
      } else {
         src_start = src_res->baseArrayLayer;
         src_end = src_start + anv_get_layerCount(src_image, src_res);
      }
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      bool flip_z = flip_coords(&src_start, &src_end, &dst_start, &dst_end);
      float src_z_step = (float)(src_end + 1 - src_start) /
         (float)(dst_end + 1 - dst_start);
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      if (flip_z) {
         src_start = src_end;
         src_z_step *= -1;
      }
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      unsigned src_x0 = region->srcOffsets[0].x;
      unsigned src_x1 = region->srcOffsets[1].x;
      unsigned dst_x0 = region->dstOffsets[0].x;
      unsigned dst_x1 = region->dstOffsets[1].x;
      bool flip_x = flip_coords(&src_x0, &src_x1, &dst_x0, &dst_x1);

      unsigned src_y0 = region->srcOffsets[0].y;
      unsigned src_y1 = region->srcOffsets[1].y;
      unsigned dst_y0 = region->dstOffsets[0].y;
      unsigned dst_y1 = region->dstOffsets[1].y;
      bool flip_y = flip_coords(&src_y0, &src_y1, &dst_y0, &dst_y1);

      const unsigned num_layers = dst_end - dst_start;
      anv_cmd_buffer_mark_image_written(cmd_buffer, dst_image,
                                        1U << aspect_bit,
                                        dst.aux_usage,
                                        dst_res->mipLevel,
                                        dst_start, num_layers);

      for (unsigned i = 0; i < num_layers; i++) {
         unsigned dst_z = dst_start + i;
         unsigned src_z = src_start + i * src_z_step;

         blorp_blit(batch, &src, src_res->mipLevel, src_z,
                    src_format.isl_format, src_format.swizzle,
                    &dst, dst_res->mipLevel, dst_z,
                    dst_format.isl_format, dst_format.swizzle,
                    src_x0, src_y0, src_x1, src_y1,
                    dst_x0, dst_y0, dst_x1, dst_y1,
                    blorp_filter, flip_x, flip_y);
      }
   }
}
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void anv_CmdBlitImage(
    VkCommandBuffer                             commandBuffer,
    VkImage                                     srcImage,
    VkImageLayout                               srcImageLayout,
    VkImage                                     dstImage,
    VkImageLayout                               dstImageLayout,
    uint32_t                                    regionCount,
    const VkImageBlit*                          pRegions,
    VkFilter                                    filter)
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{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, srcImage);
   ANV_FROM_HANDLE(anv_image, dst_image, dstImage);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < regionCount; r++) {
      VkImageBlit2KHR blit = {
         .sType          = VK_STRUCTURE_TYPE_IMAGE_BLIT_2_KHR,
         .srcSubresource = pRegions[r].srcSubresource,
         .srcOffsets     = {
            pRegions[r].srcOffsets[0],
            pRegions[r].srcOffsets[1],
         },
         .dstSubresource = pRegions[r].dstSubresource,
         .dstOffsets     = {
            pRegions[r].dstOffsets[0],
            pRegions[r].dstOffsets[1],
         },
      };

      blit_image(cmd_buffer, &batch,
                 src_image, srcImageLayout,
                 dst_image, dstImageLayout,
                 &blit, filter);
   }

   blorp_batch_finish(&batch);
}

void anv_CmdBlitImage2KHR(
    VkCommandBuffer                             commandBuffer,
    const VkBlitImageInfo2KHR*                  pBlitImageInfo)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, src_image, pBlitImageInfo->srcImage);
   ANV_FROM_HANDLE(anv_image, dst_image, pBlitImageInfo->dstImage);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < pBlitImageInfo->regionCount; r++) {
      blit_image(cmd_buffer, &batch,
                 src_image, pBlitImageInfo->srcImageLayout,
                 dst_image, pBlitImageInfo->dstImageLayout,
                 &pBlitImageInfo->pRegions[r], pBlitImageInfo->filter);
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   }

   blorp_batch_finish(&batch);
}
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/**
 * Returns the greatest common divisor of a and b that is a power of two.
 */
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static uint64_t
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gcd_pow2_u64(uint64_t a, uint64_t b)
{
   assert(a > 0 || b > 0);

   unsigned a_log2 = ffsll(a) - 1;
   unsigned b_log2 = ffsll(b) - 1;

   /* If either a or b is 0, then a_log2 or b_log2 till be UINT_MAX in which
    * case, the MIN2() will take the other one.  If both are 0 then we will
    * hit the assert above.
    */
   return 1 << MIN2(a_log2, b_log2);
}

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/* This is maximum possible width/height our HW can handle */
#define MAX_SURFACE_DIM (1ull << 14)

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static void
copy_buffer(struct anv_device *device,
            struct blorp_batch *batch,
            struct anv_buffer *src_buffer,
            struct anv_buffer *dst_buffer,
            const VkBufferCopy2KHR *region)
{
   struct blorp_address src = {
      .buffer = src_buffer->address.bo,
      .offset = src_buffer->address.offset + region->srcOffset,
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      .mocs = anv_mocs(device, src_buffer->address.bo,
                       ISL_SURF_USAGE_TEXTURE_BIT),
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   };
   struct blorp_address dst = {
      .buffer = dst_buffer->address.bo,
      .offset = dst_buffer->address.offset + region->dstOffset,
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      .mocs = anv_mocs(device, dst_buffer->address.bo,
                       ISL_SURF_USAGE_RENDER_TARGET_BIT),
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   };

   blorp_buffer_copy(batch, src, dst, region->size);
}

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void anv_CmdCopyBuffer(
    VkCommandBuffer                             commandBuffer,
    VkBuffer                                    srcBuffer,
    VkBuffer                                    dstBuffer,
    uint32_t                                    regionCount,
    const VkBufferCopy*                         pRegions)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);

   struct blorp_batch batch;
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   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
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   for (unsigned r = 0; r < regionCount; r++) {
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      VkBufferCopy2KHR copy = {
         .sType = VK_STRUCTURE_TYPE_BUFFER_COPY_2_KHR,
         .srcOffset = pRegions[r].srcOffset,
         .dstOffset = pRegions[r].dstOffset,
         .size = pRegions[r].size,
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      };
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      copy_buffer(cmd_buffer->device, &batch, src_buffer, dst_buffer, &copy);
   }

   blorp_batch_finish(&batch);

   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
}

void anv_CmdCopyBuffer2KHR(
    VkCommandBuffer                             commandBuffer,
    const VkCopyBufferInfo2KHR*                 pCopyBufferInfo)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, src_buffer, pCopyBufferInfo->srcBuffer);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, pCopyBufferInfo->dstBuffer);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

   for (unsigned r = 0; r < pCopyBufferInfo->regionCount; r++) {
      copy_buffer(cmd_buffer->device, &batch, src_buffer, dst_buffer,
                  &pCopyBufferInfo->pRegions[r]);
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   }

   blorp_batch_finish(&batch);
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   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
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}

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void anv_CmdUpdateBuffer(
    VkCommandBuffer                             commandBuffer,
    VkBuffer                                    dstBuffer,
    VkDeviceSize                                dstOffset,
    VkDeviceSize                                dataSize,
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    const void*                                 pData)
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1032
1033
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);

   struct blorp_batch batch;
1034
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
1035
1036
1037
1038
1039

   /* We can't quite grab a full block because the state stream needs a
    * little data at the top to build its linked list.
    */
   const uint32_t max_update_size =
1040
      cmd_buffer->device->dynamic_state_pool.block_size - 64;
1041
1042
1043

   assert(max_update_size < MAX_SURFACE_DIM * 4);

1044
1045
1046
1047
1048
   /* We're about to read data that was written from the CPU.  Flush the
    * texture cache so we don't get anything stale.
    */
   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT;

1049
1050
1051
1052
1053
1054
1055
1056
   while (dataSize) {
      const uint32_t copy_size = MIN2(dataSize, max_update_size);

      struct anv_state tmp_data =
         anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, copy_size, 64);

      memcpy(tmp_data.map, pData, copy_size);

1057
      struct blorp_address src = {
1058
         .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
1059
         .offset = tmp_data.offset,
1060
1061
         .mocs = isl_mocs(&cmd_buffer->device->isl_dev,
                          ISL_SURF_USAGE_TEXTURE_BIT)
1062
1063
      };
      struct blorp_address dst = {
1064
1065
         .buffer = dst_buffer->address.bo,
         .offset = dst_buffer->address.offset + dstOffset,
1066
1067
         .mocs = anv_mocs(cmd_buffer->device, dst_buffer->address.bo,
                          ISL_SURF_USAGE_RENDER_TARGET_BIT),
1068
      };
1069

1070
      blorp_buffer_copy(&batch, src, dst, copy_size);
1071
1072
1073
1074
1075
1076
1077

      dataSize -= copy_size;
      dstOffset += copy_size;
      pData = (void *)pData + copy_size;
   }

   blorp_batch_finish(&batch);
1078
1079

   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
1080
}
1081

1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
void anv_CmdFillBuffer(
    VkCommandBuffer                             commandBuffer,
    VkBuffer                                    dstBuffer,
    VkDeviceSize                                dstOffset,
    VkDeviceSize                                fillSize,
    uint32_t                                    data)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
   struct blorp_surf surf;
   struct isl_surf isl_surf;

   struct blorp_batch batch;
1095
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
1096

1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
   fillSize = anv_buffer_get_range(dst_buffer, dstOffset, fillSize);

   /* From the Vulkan spec:
    *
    *    "size is the number of bytes to fill, and must be either a multiple
    *    of 4, or VK_WHOLE_SIZE to fill the range from offset to the end of
    *    the buffer. If VK_WHOLE_SIZE is used and the remaining size of the
    *    buffer is not a multiple of 4, then the nearest smaller multiple is
    *    used."
    */
   fillSize &= ~3ull;
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125

   /* First, we compute the biggest format that can be used with the
    * given offsets and size.
    */
   int bs = 16;
   bs = gcd_pow2_u64(bs, dstOffset);
   bs = gcd_pow2_u64(bs, fillSize);
   enum isl_format isl_format = isl_format_for_size(bs);

   union isl_color_value color = {
      .u32 = { data, data, data, data },
   };

   const uint64_t max_fill_size = MAX_SURFACE_DIM * MAX_SURFACE_DIM * bs;
   while (fillSize >= max_fill_size) {
      get_blorp_surf_for_anv_buffer(cmd_buffer->device,
                                    dst_buffer, dstOffset,
                                    MAX_SURFACE_DIM, MAX_SURFACE_DIM,
1126
                                    MAX_SURFACE_DIM * bs, isl_format, true,
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
                                    &surf, &isl_surf);

      blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY,
                  0, 0, 1, 0, 0, MAX_SURFACE_DIM, MAX_SURFACE_DIM,
                  color, NULL);
      fillSize -= max_fill_size;
      dstOffset += max_fill_size;
   }

   uint64_t height = fillSize / (MAX_SURFACE_DIM * bs);
   assert(height < MAX_SURFACE_DIM);
   if (height != 0) {
      const uint64_t rect_fill_size = height * MAX_SURFACE_DIM * bs;
      get_blorp_surf_for_anv_buffer(cmd_buffer->device,
                                    dst_buffer, dstOffset,
                                    MAX_SURFACE_DIM, height,
1143
                                    MAX_SURFACE_DIM * bs, isl_format, true,
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
                                    &surf, &isl_surf);

      blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY,
                  0, 0, 1, 0, 0, MAX_SURFACE_DIM, height,
                  color, NULL);
      fillSize -= rect_fill_size;
      dstOffset += rect_fill_size;
   }

   if (fillSize != 0) {
      const uint32_t width = fillSize / bs;
      get_blorp_surf_for_anv_buffer(cmd_buffer->device,
                                    dst_buffer, dstOffset,
                                    width, 1,
1158
                                    width * bs, isl_format, true,
1159
1160
1161
1162
1163
1164
1165
1166
                                    &surf, &isl_surf);

      blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY,
                  0, 0, 1, 0, 0, width, 1,
                  color, NULL);
   }

   blorp_batch_finish(&batch);
1167
1168

   cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_BUFFER_WRITES;
1169
1170
}

1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
void anv_CmdClearColorImage(
    VkCommandBuffer                             commandBuffer,
    VkImage                                     _image,
    VkImageLayout                               imageLayout,
    const VkClearColorValue*                    pColor,
    uint32_t                                    rangeCount,
    const VkImageSubresourceRange*              pRanges)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, image, _image);

   static const bool color_write_disable[4] = { false, false, false, false };

   struct blorp_batch batch;
1185
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
1186
1187
1188
1189
1190
1191


   for (unsigned r = 0; r < rangeCount; r++) {
      if (pRanges[r].aspectMask == 0)
         continue;

1192
      assert(pRanges[r].aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1193
1194

      struct blorp_surf surf;
1195
1196
      get_blorp_surf_for_anv_image(cmd_buffer->device,
                                   image, pRanges[r].aspectMask,
1197
                                   VK_IMAGE_USAGE_TRANSFER_DST_BIT,
1198
                                   imageLayout, ISL_AUX_USAGE_NONE, &surf);
1199

1200
1201
1202
      struct anv_format_plane src_format =
         anv_get_format_plane(&cmd_buffer->device->info, image->vk_format,
                              VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
1203
1204

      unsigned base_layer = pRanges[r].baseArrayLayer;
1205
      unsigned layer_count = anv_get_layerCount(image, &pRanges[r]);
1206

1207
      for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
1208
1209
1210
1211
1212
1213
1214
1215
1216
         const unsigned level = pRanges[r].baseMipLevel + i;
         const unsigned level_width = anv_minify(image->extent.width, level);
         const unsigned level_height = anv_minify(image->extent.height, level);

         if (image->type == VK_IMAGE_TYPE_3D) {
            base_layer = 0;
            layer_count = anv_minify(image->extent.depth, level);
         }

1217
1218
1219
1220
1221
         anv_cmd_buffer_mark_image_written(cmd_buffer, image,
                                           pRanges[r].aspectMask,
                                           surf.aux_usage, level,
                                           base_layer, layer_count);

1222
         blorp_clear(&batch, &surf,
1223
                     src_format.isl_format, src_format.swizzle,
1224
1225
                     level, base_layer, layer_count,
                     0, 0, level_width, level_height,
1226
                     vk_to_isl_color(*pColor), color_write_disable);
1227
1228
1229
1230
1231
      }
   }

   blorp_batch_finish(&batch);
}
1232

1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
void anv_CmdClearDepthStencilImage(
    VkCommandBuffer                             commandBuffer,
    VkImage                                     image_h,
    VkImageLayout                               imageLayout,
    const VkClearDepthStencilValue*             pDepthStencil,
    uint32_t                                    rangeCount,
    const VkImageSubresourceRange*              pRanges)
{
   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
   ANV_FROM_HANDLE(anv_image, image, image_h);

   struct blorp_batch batch;
   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);

1247
   struct blorp_surf depth, stencil, stencil_shadow;
1248
   if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
1249
1250
      get_blorp_surf_for_anv_image(cmd_buffer->device,
                                   image, VK_IMAGE_ASPECT_DEPTH_BIT,
1251
                                   VK_IMAGE_USAGE_TRANSFER_DST_BIT,
1252
                                   imageLayout, ISL_AUX_USAGE_NONE, &depth);
1253
1254
1255
1256
   } else {
      memset(&depth, 0, sizeof(depth));
   }

1257
   bool has_stencil_shadow = false;
1258
   if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
1259
1260
      get_blorp_surf_for_anv_image(cmd_buffer->device,
                                   image, VK_IMAGE_ASPECT_STENCIL_BIT,
1261
                                   VK_IMAGE_USAGE_TRANSFER_DST_BIT,
1262
                                   imageLayout, ISL_AUX_USAGE_NONE, &stencil);
1263
1264
1265
1266
1267

      has_stencil_shadow =
         get_blorp_surf_for_anv_shadow_image(cmd_buffer->device, image,
                                             VK_IMAGE_ASPECT_STENCIL_BIT,
                                             &stencil_shadow);
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
   } else {
      memset(&stencil, 0, sizeof(stencil));
   }

   for (unsigned r = 0; r < rangeCount; r++) {
      if (pRanges[r].aspectMask == 0)
         continue;

      bool clear_depth = pRanges[r].aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT;
      bool clear_stencil = pRanges[r].aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT;

      unsigned base_layer = pRanges[r].baseArrayLayer;
1280
      unsigned layer_count = anv_get_layerCount(image, &pRanges[r]);
1281

1282
      for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
         const unsigned level = pRanges[r].baseMipLevel + i;
         const unsigned level_width = anv_minify(image->extent.width, level);
         const unsigned level_height = anv_minify(image->extent.height, level);

         if (image->type == VK_IMAGE_TYPE_3D)
            layer_count = anv_minify(image->extent.depth, level);

         blorp_clear_depth_stencil(&batch, &depth, &stencil,
                                   level, base_layer, layer_count,
                                   0, 0, level_width, level_height,
                                   clear_depth, pDepthStencil->depth,
                                   clear_stencil ? 0xff : 0,
                                   pDepthStencil->stencil);
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306

         if (clear_stencil && has_stencil_shadow) {
            union isl_color_value stencil_color = {
               .u32 = { pDepthStencil->stencil, },
            };
            blorp_clear(&batch, &stencil_shadow,
                        ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
                        level, base_layer, layer_count,
                        0, 0, level_width, level_height,
                        stencil_color, NULL);
         }
1307
1308
1309
1310
1311
1312
      }
   }

   blorp_batch_finish(&batch);
}

1313
VkResult
1314
1315
anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer,
                                         uint32_t num_entries,
1316
1317
                                         uint32_t *state_offset,
                                         struct anv_state *bt_state)
1318
{
1319
1320
1321
   *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer, num_entries,
                                                  state_offset);
   if (bt_state->map == NULL) {
1322
      /* We ran out of space.  Grab a new binding table block. */
1323
1324
1325
      VkResult result = anv_cmd_buffer_new_binding_table_block(cmd_buffer);
      if (result != VK_SUCCESS)
         return result;
1326
1327
1328
1329
1330
1331

      /* Re-emit state base addresses so we get the new surface state base
       * address before we start emitting binding tables etc.
       */
      anv_cmd_buffer_emit_state_base_address(cmd_buffer);

1332
1333
1334
      *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer, num_entries,
                                                     state_offset);
      assert(bt_state->map != NULL);
1335
1336
   }

1337
   return VK_SUCCESS;
1338
1339
}

1340
static VkResult
1341
binding_table_for_surface_state(struct anv_cmd_buffer *cmd_buffer,
1342
1343
                                struct anv_state surface_state,
                                uint32_t *bt_offset)
1344
1345
{
   uint32_t state_offset;
1346
1347
1348
1349
1350
1351
1352
   struct anv_state bt_state;

   VkResult result =
      anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, 1, &state_offset,
                                               &bt_state);
   if (result != VK_SUCCESS)
      return result;
1353
1354
1355
1356

   uint32_t *bt_map = bt_state.map;
   bt_map[0] = surface_state.offset + state_offset;

1357
1358
   *bt_offset = bt_state.offset;
   return VK_SUCCESS;
1359
1360
}

1361
1362
1363
1364
1365
1366
1367
static void
clear_color_attachment(struct anv_cmd_buffer *cmd_buffer,
                       struct blorp_batch *batch,
                       const VkClearAttachment *attachment,
                       uint32_t rectCount, const VkClearRect *pRects)
{
   const struct anv_subpass *subpass = cmd_buffer->state.subpass;
1368
   const uint32_t color_att = attachment->colorAttachment;
1369
   assert(color_att < subpass->color_count);
1370
   const uint32_t att_idx = subpass->color_attachments[color_att].attachment;
1371
1372
1373
1374

   if (att_idx == VK_ATTACHMENT_UNUSED)
      return;

1375
1376
1377
1378
   struct anv_render_pass_attachment *pass_att =
      &cmd_buffer->state.pass->attachments[att_idx];
   struct anv_attachment_state *att_state =
      &cmd_buffer->state.attachments[att_idx];
1379

1380
1381
   uint32_t binding_table;
   VkResult result =
1382
      binding_table_for_surface_state(cmd_buffer, att_state->color.state,
1383
1384
1385
                                      &binding_table);
   if (result != VK_SUCCESS)
      return;
1386

1387
1388
   union isl_color_value clear_color =
      vk_to_isl_color(attachment->clearValue.color);
1389

1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
   /* If multiview is enabled we ignore baseArrayLayer and layerCount */
   if (subpass->view_mask) {
      uint32_t view_idx;
      for_each_bit(view_idx, subpass->view_mask) {
         for (uint32_t r = 0; r < rectCount; ++r) {
            const VkOffset2D offset = pRects[r].rect.offset;
            const VkExtent2D extent = pRects[r].rect.extent;
            blorp_clear_attachments(batch, binding_table,
                                    ISL_FORMAT_UNSUPPORTED, pass_att->samples,
                                    view_idx, 1,
                                    offset.x, offset.y,
                                    offset.x + extent.width,
                                    offset.y + extent.height,
                                    true, clear_color, false, 0.0f, 0, 0);
         }
      }
      return;
   }

1409
1410
1411
   for (uint32_t r = 0; r < rectCount; ++r) {
      const VkOffset2D offset = pRects[r].rect.offset;
      const VkExtent2D extent = pRects[r].rect.extent;
1412
      assert(pRects[r].layerCount != VK_REMAINING_ARRAY_LAYERS);
1413
1414
1415
1416
1417
1418
1419
      blorp_clear_attachments(batch, binding_table,
                              ISL_FORMAT_UNSUPPORTED, pass_att->samples,
                              pRects[r].baseArrayLayer,
                              pRects[r].layerCount,
                              offset.x, offset.y,
                              offset.x + extent.width, offset.y + extent.height,
                              true, clear_color, false, 0.0f, 0, 0);
1420
1421
1422
1423
1424
1425
1426
1427
1428
   }
}

static void
clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer,
                               struct blorp_batch *batch,
                               const VkClearAttachment *attachment,
                               uint32_t rectCount, const VkClearRect *pRects)
{
1429
   static const union isl_color_value color_value = { .u32 = { 0, } };
1430
   const struct anv_subpass *subpass = cmd_buffer->state.subpass;
1431
   if (!subpass->depth_stencil_attachment)
1432
1433
      return;

1434
1435
   const uint32_t att_idx = subpass->depth_stencil_attachment->attachment;
   assert(att_idx != VK_ATTACHMENT_UNUSED);
1436
1437
   struct anv_render_pass_attachment *pass_att =
      &cmd_buffer->state.pass->attachments[att_idx];
1438
1439
1440
1441

   bool clear_depth = attachment->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT;
   bool clear_stencil = attachment->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT;

1442
   enum isl_format depth_format = ISL_FORMAT_UNSUPPORTED;
1443
   if (clear_depth) {
1444
1445
1446
1447
      depth_format = anv_get_isl_format(&cmd_buffer->device