1. 02 Mar, 2021 1 commit
  2. 18 Feb, 2021 2 commits
    • Tejas Upadhyay's avatar
      intel: add INTEL_ADLS_IDS to the pciids list · 3b6cfb20
      Tejas Upadhyay authored
      This enables drm_intel_bufmgr on ADLS
      Signed-off-by: Tejas Upadhyay's avatarTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
      Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
      3b6cfb20
    • Tejas Upadhyay's avatar
      intel: sync i915_pciids.h with kernel · 9086ff9d
      Tejas Upadhyay authored
      Align with kernel commits:
      
      0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
      04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
      0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
      605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
      514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
      32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
      df3478af1d73 ("drm/i915: Sort CML PCI IDs")
      cd988984cbea ("drm/i915: Sort KBL PCI IDs")
      b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
      9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
      79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
      cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
      03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
      812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
      194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
      82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
      24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
      b50b7991b739 ("drm/i915/dg1: add more PCI ids")
      d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")
      f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
      0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
      04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
      0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
      605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
      514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
      32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
      df3478af1d73 ("drm/i915: Sort CML PCI IDs")
      cd988984cbea ("drm/i915: Sort KBL PCI IDs")
      b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
      9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
      79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
      cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
      03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
      812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
      194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
      82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
      24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
      b50b7991b739 ("drm/i915/dg1: add more PCI ids")
      d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")
      Signed-off-by: Tejas Upadhyay's avatarTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
      Reviewed-by: Lionel Landwerlin's avatarLandwerlin, Lionel G <lionel.g.landwerlin@intel.com>
      9086ff9d
  3. 30 Sep, 2020 1 commit
  4. 27 Aug, 2020 1 commit
  5. 21 Aug, 2020 1 commit
  6. 08 Jul, 2020 1 commit
  7. 30 Apr, 2020 1 commit
  8. 27 Apr, 2020 1 commit
  9. 23 Mar, 2020 1 commit
  10. 28 Jan, 2020 1 commit
  11. 17 Dec, 2019 1 commit
  12. 11 Nov, 2019 1 commit
  13. 18 Oct, 2019 1 commit
  14. 16 Oct, 2019 1 commit
  15. 14 Oct, 2019 1 commit
  16. 04 Oct, 2019 2 commits
  17. 06 Sep, 2019 1 commit
  18. 30 Jul, 2019 2 commits
  19. 29 Jul, 2019 1 commit
  20. 17 Apr, 2019 1 commit
  21. 25 Mar, 2019 1 commit
  22. 04 Feb, 2019 1 commit
    • Rodrigo Vivi's avatar
      intel: sync i915_pciids.h with kernel · 70a1ae89
      Rodrigo Vivi authored
      Straight copy from the kernel file.
      
      Add more PCI Device IDs for Coffee Lake, Ice Lake,
      and Amber Lake. It also include a reorg on Whiskey Lake IDs.
      
      Align with kernel commits:
      
      5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
      03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
      c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
      c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
      
      Cc: José Roberto de Souza <jose.souza@intel.com>
      Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Acked-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
      70a1ae89
  23. 04 Oct, 2018 3 commits
  24. 20 Sep, 2018 4 commits
  25. 12 Sep, 2018 1 commit
  26. 05 Sep, 2018 5 commits
  27. 14 Aug, 2018 1 commit
  28. 20 Jun, 2018 1 commit