1. 08 Aug, 2018 2 commits
  2. 30 Jul, 2018 4 commits
  3. 18 Jun, 2018 1 commit
  4. 09 May, 2018 1 commit
    • Rob Clark's avatar
      freedreno: add fd_pipe refcounting · c5a65681
      Rob Clark authored
      
      
      In mesa/gallium, a pipe_fence can outlive the pipe_context it was
      created from.  But to wait on the fence we need to know the submit-
      queue (ie. the fd_pipe).
      
      The most straightforward way to fix this is to add reference counting
      to the fd_pipe and let the fence hold a reference to the pipe (rather
      than hanging on to the context, which might have been destroyed before
      the fence).
      Signed-off-by: default avatarRob Clark <robclark@freedesktop.org>
      c5a65681
  5. 20 Mar, 2018 1 commit
  6. 09 Mar, 2018 1 commit
  7. 08 Mar, 2018 1 commit
  8. 26 Feb, 2018 1 commit
    • Rob Clark's avatar
      freedreno: add interface to get buffer address · 1384c081
      Rob Clark authored
      
      
      Needed for clover/OpenCL.  Fortunately the kernel interface is already
      in place.
      
      Include a stub _put_iova() so mesa can tell us when it no longer needs
      the buffer to be pinned.  There is no kernel interface for this (yet),
      but at least if we want to unpin buffers we won't need mesa changes.
      Signed-off-by: default avatarRob Clark <robclark@freedesktop.org>
      1384c081
  9. 23 Feb, 2018 1 commit
  10. 29 Jan, 2018 2 commits
  11. 26 Jan, 2018 1 commit
    • Rob Clark's avatar
      freedreno: clamp priority based on # of rings · 6f0f6cee
      Rob Clark authored
      
      
      In case of a kernel that is new enough to support multiple submit-
      queues, but with an adreno generation which doesn't support multiple
      prioritized ringbuffers, we'd attempt to open a submit-queue with
      prio=1 (medium), which is rejected by the kernel.
      
      This could happen either w/ an older mesa (which uses fd_pipe_new())
      or a newer mesa which defaults to prio=1 if no pipe context priority
      flags are set.
      
      The simple answer to fix both cases is to clamp the requested priority
      according to the number of rings.  This might not do exactly what you
      want, if we hypothetically had 2 rings (it would result in requested
      medium priority being high priority instead of low priority).  But the
      number of rings (for hw gen's that support this) is purely a software
      construct, so the easy answer there is to have the kernel advertise at
      least 3 rings if it supports more than one.  There isn't really any
      reason to do otherwise.
      Signed-off-by: default avatarRob Clark <robclark@freedesktop.org>
      6f0f6cee
  12. 25 Jan, 2018 1 commit
  13. 12 Jan, 2018 1 commit
  14. 07 Nov, 2017 1 commit
  15. 04 Nov, 2017 2 commits
  16. 15 Sep, 2017 1 commit
  17. 07 Aug, 2017 3 commits
  18. 15 Apr, 2017 1 commit
  19. 23 Mar, 2017 2 commits
  20. 21 Mar, 2017 1 commit
    • Rob Clark's avatar
      freedreno: fix potential use-after-free on a5xx+ · 2b7453f4
      Rob Clark authored
      
      
      Something that valgrind spotted:
      
      ==8441== Invalid read of size 4
      ==8441==    at 0x5DEE168: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:506)
      ==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
      ==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
      ==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
      ==8441==    by 0x5B4910F: fd5_emit_tile_gmem2mem (fd5_gmem.c:477)
      ==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
      ==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
      ==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
      ==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
      ==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
      ==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
      ==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
      ==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
      ==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
      ==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)
      ==8441==    by 0x4AC8A67: MakeContextCurrent (glxcurrent.c:214)
      ==8441==  Address 0x6f5eb1c is 204 bytes inside a block of size 240 free'd
      ==8441==    at 0x4868F44: realloc (vg_replace_malloc.c:785)
      ==8441==    by 0x5DEE143: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:502)
      ==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
      ==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
      ==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
      ==8441==    by 0x5B4910F: fd5_emit_tile_gmem2mem (fd5_gmem.c:477)
      ==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
      ==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
      ==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
      ==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
      ==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
      ==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
      ==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
      ==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
      ==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
      ==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)
      ==8441==  Block was alloc'd at
      ==8441==    at 0x4868F44: realloc (vg_replace_malloc.c:785)
      ==8441==    by 0x5DEE08B: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:481)
      ==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
      ==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
      ==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
      ==8441==    by 0x5B4909F: fd5_emit_tile_gmem2mem (fd5_gmem.c:465)
      ==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
      ==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
      ==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
      ==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
      ==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
      ==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
      ==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
      ==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
      ==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
      ==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)
      Signed-off-by: default avatarRob Clark <robclark@freedesktop.org>
      2b7453f4
  21. 27 Jan, 2017 2 commits
  22. 26 Nov, 2016 1 commit
  23. 14 Nov, 2016 1 commit
  24. 05 Nov, 2016 2 commits
  25. 23 Jul, 2016 1 commit
  26. 21 Jul, 2016 3 commits
  27. 20 Jul, 2016 1 commit