- 13 Jul, 2022 9 commits
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Luc Ma authored
Signed-off-by:Luc Ma <onion0709@gmail.com>
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SIGSEGV is used by Vulkan API trace layers to track user changes in device memory mapped to user space. Now with drivers such as Zink, GLES applications are translated into Vulkan API calls and therefore it is possible to be tracked by Vulkan api trace layers. Blocking SIGSEGV hinders one of the memory tracking mechanisms used by such layers. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Adam Jackson <ajax@redhat.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!17273>
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Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <mesa/mesa!17486> -
Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: 
Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <mesa/mesa!17481> -
It's legal for an application to call vkInvalidateMappedMemoryRanges() / vkFlushMappedMemoryRanges() with zero sized ranges. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b91971c2 ("anv: use the right helper to invalidate memory")
Cc: mesa-stable
Closes: mesa/mesa#6852
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <mesa/mesa!17481> -
With dynamic vertex bindings the vertex format lookups are a lot more frequent (vs being baked in the pipeline). Add a simple lookup cache using a dynamic array to keep track of the hw values, and avoid repeated translation. This also reduces the memset to just the bitfields since all the others will be overwritten. Seen in perf traces gputest gimark with zink on radv. Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!15846>
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Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: 
Nanley Chery <nanley.g.chery@intel.com>
Part-of: <mesa/mesa!17385> -
Ensure that if we have swizzle on the initial format, that the component bits are identical with the lowered format. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <mesa/mesa!17385> -
For some formats like VK_FORMAT_B5G6R5_UNORM_PACK16, we have no direct matching HW format. We can support it by swizzling. We already apply those swizzles for image views. We just forgot to deal with buffer views. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: mesa/mesa#6235
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <mesa/mesa!17385>
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- 12 Jul, 2022 31 commits
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Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: -
All tracepoints are enabled by default. Example: FD_GPU_TRACEPOINT=-flush_batch Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <mesa/mesa!16781> -
This way we will not need to repeat arguments for "start" and "end" tracepoints. Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <mesa/mesa!16781> -
Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <mesa/mesa!16781> -
All tracepoints are enabled by default. Example: TU_GPU_TRACEPOINT=-sysmem_clear Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <mesa/mesa!16781> -
This way we will not need to repeat arguments for "start" and "end" tracepoints. Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <mesa/mesa!16781> -
Fixes: e1811af7 ("util/perf: add options to enable/disable tracepoints") Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: -
This MR just saw it happen for the second time I've noticed. Part-of: <mesa/mesa!17470>
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Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
We were defaulting to a swap interval of 1, but we can follow dri2/dri3's lead and respect the driconf var. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
We need it from kopper, as well. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
We need to track what the caller has given us for swap interval, and use that to set the present mode at startup. Fixes incorrect vblank syncing in apitrace's glretrace, which sets the swap interval to 0 before the swapchain is made. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
Compare to dri2SetSwapInterval() and dri3_set_swap_interval() implementations of the same method. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: -
Fill in support for TXD instruction which emits shader TEXLDD opcode. Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Lucas Stach <l.stach@pengutronix.de> Part-of: <mesa/mesa!17500>
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Rename the args from low_bias/compare to src1/src2, since they are used for different purposes depending on the texture load type. No functional change. Signed-off-by:
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Test: dEQP-VK.api.info.sparse_image_format_properties2.* Fixes: 1a7632e5 ("venus: add NO_FENCE_FEEDBACK perf option and disable sparse resource") Signed-off-by:
Yiwei Zhang <zzyiwei@chromium.org> Reviewed-by:
Ryan Neph <ryanneph@google.com> Part-of: <mesa/mesa!17476>
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While SPIR-V's OpKill is block terminating, the converted discard intrinsic is not block terminating. This can lead to issues where instruction could be placed after discard. This patch adds an extra pass that drops all instructions after discard before we convert discards. Reviewed-by:
Jesse Natalie <jenatali@microsoft.com> Part-of: <mesa/mesa!17474>
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Signed-off-by:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <mesa/mesa!17492> -
This is intended to return true on attribute-found. Part-of: <mesa/mesa!17422>
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We only use it at init time, no need to keep it around. Part-of: <mesa/mesa!17422>
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This is effectively looked up from the config anyway, which we're already passing in. Part-of: <mesa/mesa!17422>
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This was needed when we emitted an xlib request here, but xcb knows the GLX major opcode for the connection already. Part-of: <mesa/mesa!17422>
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Part-of: <mesa/mesa!17422>
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This answers the question in a comment in turnip, and fixes some GL46 tests and piglit tests. Part-of: <mesa/mesa!17494>
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Reviewed-by:
Jose Maria Casanova Crespo <jmcasanova@igalia.com> Part-of: <mesa/mesa!17449>
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Reviewed-by:
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It was checking "mesa's theoretical max attributes" rather than "the driver's max attributes." Reviewed-by:
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Fixes arb_timer_query-timestamp-get on my radv system, where the GPU has been on for many days and the timestamp would only increment every once in a while. Part of fixing #6808 Fixes: 7a40b734 ("zink: handle timestamp queries") Reviewed-by:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <mesa/mesa!17477> -
With that the actual call will be eliminated if the code is compiled with NDEBUG. Fixes: 79ca456b r600/sfn: rewrite NIR backend Closes: mesa/mesa#6832 Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Reviewed-by:
Filip Gawin <filip@gawin.net>
Part-of: <mesa/mesa!17496> -
Signed-off-by:
Eric Engestrom <eric@igalia.com> Reviewed-by:
Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <!17342>
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