- Mar 04, 2019
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Mar 02, 2019
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Erico Nunes authored
This commit adds an option to force register spilling usage, for debugging and testing purposes. The option is picked from an environment variable which will cause the register allocation to trigger the register spilling routine for a specified number of times, even if the register allocator originally succeeded. Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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Erico Nunes authored
This implements register spilling for ppir. That is, storing some values in memory as temporaries for when the number of available pp registers is not enough. The strategy for spilling is to find the most long lived register during the program and spill it, hoping that the number of iterations spilling registers is kept to a minimum. Then, for each use of the chosen register, the register allocator will insert instructions to load the value from memory before using, and in case of a write operation, insert another instruction to store it afterwards. To account for operations partially updating vector registers, a load operation is also inserted before write operations. Many of these operations might not be absolutely necessary in all cases, but instructions are inserted anyway in order to keep the spilling algorithm simpler. Registers are always stored as vec4 in memory even if their use is not 4 components, again to keep the algorithm for spilling simpler. This implementation for spilling is not the most optional possible, but it is a working implementation. Hopefully, spilling should be left as a last resource and effort is best spent optimizing other parts of ppir rather than in optimizing the use of temporaries. This code has been tested with a debug patch that forces spilling regardless of whether the mesa register allocator succeeded or not. It was possible to test multiple spilling iterations and it seems to work. Also, the fragment shader shipped in the gbm-surface-render-two gfx example requires spilling to be implemented with ppir, and it renders successfully with this patch. Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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Erico Nunes authored
This commit prepares the pp command stream to set the fragment shader stack address and size registers. These registers are part of the pp frame register. The address set has to be different per pp, and the value is expected to be sent to the kernel in a separate variable than the pp frame register structure. The size register is also set per pp, all pp get the same value as the value in the pp frame register structure. The size register is composed by the "stack size" and "stack offset" values. The lima ppir still does not implement the actual use of temporaries as of this commit, this implementation is to be done in an upcoming patch. Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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Erico Nunes authored
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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Erico Nunes authored
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Feb 18, 2019
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marmeladema authored
When the following code path happens: lima_context_create |-> lima_submit_create |-> drmSyncobjCreate: can fail here |Thus ctx->pp_submit and ctx->gp_submit are NULL |-> lima_context_destroy |-> lima_submit_free: will access submit->in_sync_fd It triggers a segfault in mesa because we are trying to derefence both ctx->pp_submit and ctx->gp_submit which are NULL.
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- Feb 17, 2019
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Feb 16, 2019
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Feb 13, 2019
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Feb 12, 2019
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
This can free user space to record the submit bos before task finish. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Jan 27, 2019
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Alistair Francis authored
On GCC8 egl fails to compile with this error: error: 'NULL' undeclared (first use in this function) As NULL is declared in stddef.h add it as an include to fix the build failure. Signed-off-by: Alistair Francis <alistair@alistair23.me>
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- Jan 08, 2019
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Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
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Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
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Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
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- Jan 01, 2019
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Erico Nunes authored
As already mentioned in the lima project utgard documentation, for sin and cos, the input has to multiplied by the constant 1/(2*pi), presumably to simplify the hardware. The binary compiler outputs a multiplication in the fragment shader to compensate for this, do the same in ppir. Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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- Dec 30, 2018
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Qiang Yu authored
condition instruction must be in fmul slot. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 29, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 23, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 20, 2018
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Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
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- Dec 14, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 12, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 11, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- Dec 10, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Some lima_ctx_buff is allocated conditionally for each draw like gp_uniform, pp_uniform and tex_desc. mmu fault will happen when: draw 1: tex_desc (i.e.) is allocated and added to PP submit, draw is OK draw 2: no LIMA_CONTEXT_DIRTY_TEXTURES, so tex_desc is unchanged, but not added to PP submit draw 3: LIMA_CONTEXT_DIRTY_TEXTURES, so original tex_desc is freed and allocate a new one So draw 2 may get mmu fault because the tex_desc buffer is freed when its execution. Move submit add to lima_ctx_buff_va so that the buffer will be added whenever get used by GPU command stream. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Without this fix, ppir codegen outputs instructions that always write to the x component of the output register, so a simple shader like this won't work: gl_FragColor = vec4(color.rg, sqrt(color.b*color.b), color.a); It produces sqrt.s2 $0.x $1.x instead of sqrt.s2 $0.z $1.x Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
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- Dec 08, 2018
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Qiang Yu authored
This help we know the last error draw and get its command stream dump. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
fragment shader from glamor: precision mediump float; varying vec2 glyph_pos; uniform sampler2D sampler; uniform sampler2D atlas; void main() { vec4 mask = texture2D(atlas, glyph_pos); vec4 source = texture2D(sampler, vec2(0.5)); gl_FragColor = source * mask.a; } v2: Solve in lower pass instead of node-to-instr pass. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
RGBX will always set alpha channel to 1 while RGBA will pass orignal alpha channel. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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