• Thierry Reding's avatar
    gpu: host1x: Support 40-bit addressing · 67a82dbc
    Thierry Reding authored
    Tegra186 and later support 40 bits of address space. Additional
    registers need to be programmed to store the full 40 bits of push
    buffer addresses.
    
    Since command stream gathers can also reside in buffers in a 40-bit
    address space, a new variant of the GATHER opcode is also introduced.
    It takes two parameters: the first parameter contains the lower 32
    bits of the address and the second parameter contains bits 32 to 39.
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    67a82dbc
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