- May 12, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- May 11, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
For support EGL_ANDROID_native_fence_sync. Submit accept dependency from other tasks. Dependency can be lima native fence or sync file fd. Explicit sync can be enabled by the submit flags. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- May 10, 2018
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Qiang Yu authored
No need to wait for each buffer object idle if we fini ctx mgr before free them. va unmap case also don't need to wait because UMD is responsible for it. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
This reverts commit 45c3d213. lima driver need preclose to wait all task in the context created within closing file to finish before free all the buffer object. Otherwise pending tesk may fail and get noisy MMU fault message. Move this wait to each buffer object free function can achieve the same result but some buffer object is shared with other file context, but we only want to wait the closing file context's tasks. So the implementation is not that straight forword compared to the preclose one. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- May 09, 2018
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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- May 08, 2018
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Qiang Yu authored
Reg definition may change from time to time as this is a reverse engineering project. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
lima_sched_context_add_fence may call dma_fence_wait and go to sleep. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
On mali400, GP and PP pipe may access the same l2 cache at the same time. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Prepare for full mali450 support. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Try to preallocate the memory with idr_prealloc(GFP_KERNEL) and change the allocation flags under spin lock. Based on commit 2c8468dc ("net: sched: don't use GFP_KERNEL under spin lock") Signed-off-by: Alban Browaeys <alban.browaeys@gmail.com>
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Meson mali GPU operate in high clock frequency, need this value be high to work in a stable state. Signed-off-by: Andrei Paulau <7134956@gmail.com>
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Qiang Yu authored
This error is due to assigned long return value to int which may cause overflow in 64bit arch. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
When job error, task->fence is un-init, so job free should not call dma_fence_put on it. Now we just move fence alloc into job run, so task->fence is NULL when job error, and job free dma_fence_put has no effect on it. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Meson mali GPU operate in high clock frequency, need this value be high to work in a stable state. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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All users of inteval tree are required to use rb_root_cached since f808c13f. Switch to rb_root_cached to fix lima compilation with 4.15 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Without that, at least on arm64 te build fails with ../drivers/gpu/drm/lima/lima_gem.c: In function ‘lima_gem_create_handle’: ../drivers/gpu/drm/lima/lima_gem.c:92:2: error: implicit declaration of function ‘mapping_set_gfp_mask’; did you mean ‘pci_set_dma_mask’? [-Werror=implicit-function-declaration] mapping_set_gfp_mask(bo->gem.filp->f_mapping, mask); ^~~~~~~~~~~~~~~~~~~~ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
This field indicates how many tasks before current submitted task is done which is used for mesa to free finished task resources. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
PP do error handling when all processors done. Add missing MMU resume. Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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Qiang Yu authored
Signed-off-by: Qiang Yu <yuq825@gmail.com>
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