Commit de5469c2 authored by Thierry Reding's avatar Thierry Reding

gpu: host1x: Program the channel stream ID

When processing command streams, make sure the host1x's stream ID is
programmed for the channel so that addresses are properly translated
through the SMMU.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 6841482b
......@@ -17,6 +17,7 @@
*/
#include <linux/host1x.h>
#include <linux/iommu.h>
#include <linux/slab.h>
#include <trace/events/host1x.h>
......@@ -89,6 +90,16 @@ static inline void synchronize_syncpt_base(struct host1x_job *job)
HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(value));
}
static void host1x_channel_set_streamid(struct host1x_channel *channel)
{
#if HOST1X_HW >= 6
struct iommu_fwspec *spec = dev_iommu_fwspec_get(channel->dev->parent);
u32 sid = spec ? spec->ids[0] & 0xffff : 0x7f;
host1x_ch_writel(channel, sid, HOST1X_CHANNEL_SMMU_STREAMID);
#endif
}
static int channel_submit(struct host1x_job *job)
{
struct host1x_channel *ch = job->channel;
......@@ -120,6 +131,8 @@ static int channel_submit(struct host1x_job *job)
goto error;
}
host1x_channel_set_streamid(ch);
/* begin a CDMA submit */
err = host1x_cdma_begin(&ch->cdma, job);
if (err) {
......
......@@ -22,6 +22,7 @@
#include <linux/types.h>
#include <linux/bitops.h>
#include "hw_host1x06_channel.h"
#include "hw_host1x06_uclass.h"
#include "hw_host1x06_vm.h"
#include "hw_host1x06_hypervisor.h"
......
......@@ -22,6 +22,7 @@
#include <linux/types.h>
#include <linux/bitops.h>
#include "hw_host1x07_channel.h"
#include "hw_host1x07_uclass.h"
#include "hw_host1x07_vm.h"
#include "hw_host1x07_hypervisor.h"
......
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 NVIDIA Corporation.
*/
#ifndef HOST1X_HW_HOST1X06_CHANNEL_H
#define HOST1X_HW_HOST1X06_CHANNEL_H
#define HOST1X_CHANNEL_SMMU_STREAMID 0x084
#endif
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 NVIDIA Corporation.
*/
#ifndef HOST1X_HW_HOST1X07_CHANNEL_H
#define HOST1X_HW_HOST1X07_CHANNEL_H
#define HOST1X_CHANNEL_SMMU_STREAMID 0x084
#endif
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