Commit 8de896eb authored by Thierry Reding's avatar Thierry Reding

gpu: host1x: Support 40-bit addressing on Tegra186

The host1x and clients instantiated on Tegra186 support addressing 40
bits of memory.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 38fabcc9
......@@ -136,7 +136,7 @@ static const struct host1x_info host1x06_info = {
.nb_bases = 16,
.init = host1x06_init,
.sync_offset = 0x0,
.dma_mask = DMA_BIT_MASK(34),
.dma_mask = DMA_BIT_MASK(40),
.has_hypervisor = true,
.num_sid_entries = ARRAY_SIZE(tegra186_sid_table),
.sid_table = tegra186_sid_table,
......
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