1. 17 May, 2018 1 commit
    • Thierry Reding's avatar
      gpu: host1x: Acquire a reference to the IOVA cache · f40e1590
      Thierry Reding authored
      The IOVA API uses a memory cache to allocate IOVA nodes from. To make
      sure that this cache is available, obtain a reference to it and release
      the reference when the cache is no longer needed.
      On 64-bit ARM this is hidden by the fact that the DMA mapping API gets
      that reference and never releases it. On 32-bit ARM, this is papered
      over by the Tegra DRM driver (the sole user of the host1x API requiring
      the cache) acquiring a reference to the IOVA cache for its own purposes.
      However, there may be additional users of this API in the future, so fix
      this upfront to avoid surprises.
      Fixes: 404bfb78 ("gpu: host1x: Add IOMMU support")
      Reviewed-by: Dmitry Osipenko's avatarDmitry Osipenko <digetx@gmail.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
  2. 21 Dec, 2017 1 commit
    • Thierry Reding's avatar
      gpu: host1x: Use IOMMU groups · 41c3068c
      Thierry Reding authored
      Use IOMMU groups to attach the host1x device to its IOMMU domain. This
      is not strictly necessary because the domain isn't shared with any other
      device, but it makes the code consistent with how IOMMU is handled in
      other drivers and provides an easy way to detect when no IOMMU has been
      attached via device tree.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
  3. 13 Dec, 2017 1 commit
  4. 20 Oct, 2017 2 commits
  5. 27 Sep, 2017 1 commit
  6. 17 Aug, 2017 1 commit
  7. 27 Jul, 2017 1 commit
  8. 15 Jun, 2017 2 commits
  9. 05 Apr, 2017 3 commits
  10. 23 Jun, 2016 2 commits
  11. 04 Mar, 2016 1 commit
  12. 14 Dec, 2015 2 commits
  13. 27 Jan, 2015 1 commit
    • Thierry Reding's avatar
      gpu: host1x: Provide a proper struct bus_type · f4c5cf88
      Thierry Reding authored
      Previously the struct bus_type exported by the host1x infrastructure was
      only a very basic skeleton. Turn that implementation into a more full-
      fledged bus to support proper probe ordering and power management.
      Note that the bus infrastructure needs to be available before any of the
      drivers can be registered. This is automatically ensured if all drivers
      are built as loadable modules (via symbol dependencies). If all drivers
      are built-in there are no such guarantees and the link order determines
      the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
      host1x bus infrastructure is initialized prior to any of its users (only
      drm/tegra currently).
      v2: Fix building host1x and tegra-drm as modules
      Reported-by: default avatarDave Airlie <airlied@gmail.com>
      Reviewed-by: Sean Paul's avatarSean Paul <seanpaul@chromium.org>
      Reviewed-by: default avatarMark Zhang <markz@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
  14. 19 Dec, 2013 2 commits
  15. 31 Oct, 2013 5 commits
  16. 03 Sep, 2013 1 commit
  17. 22 Apr, 2013 6 commits