Commit 7e25eb01 authored by Thierry Reding's avatar Thierry Reding Committed by Stephen Warren

ARM: tegra: Fix some whitespace oddities

Some of the powergate code uses unusual spacing around == and has a tab
instead of a space before an opening parenthesis.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 8a0a1af3
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