• Ian Romanick's avatar
    intel/fs: Fix flag_subreg handling in cmod propagation · 8030cb75
    Ian Romanick authored
    There were two errors.  First, the pass could propagate conditional
    modifiers from an instruction that writes on flag register to an
    instruction that writes a different flag register.  For example,
    
        cmp.nz.f0.0(16) null:F, vgrf6:F, vgrf5:F
        cmp.nz.f0.1(16) null:F, vgrf6:F, vgrf5:F
    
    could be come
    
        cmp.nz.f0.0(16) null:F, vgrf6:F, vgrf5:F
    
    Second, if an instruction writes f0.1 has it's condition propagated, the
    modified instruction will incorrectly write flag f0.0.  For example,
    
        linterp(16) vgrf6:F, g2:F, attr0:F
        cmp.z.f0.1(16) null:F, vgrf6:F, vgrf5:F
        (-f0.1) discard_jump(16) (null):UD
    
    could become
    
        linterp.z.f0.0(16) vgrf6:F, g2:F, attr0:F
        (-f0.1) discard_jump(16) (null):UD
    
    None of these cases will occur currently.  The only time we use f0.1 is
    for generating discard intrinsics.  In all those cases, we generate a
    squence like:
    
        cmp.nz.f0.0(16) vgrf7:F, vgrf6:F, vgrf5:F
        (+f0.1) cmp.z(16) null:D, vgrf7:D, 0d
        (-f0.1) discard_jump(16) (null):UD
    
    Due to the mixed types and incompatible conditions, this sequence would
    never see any cmod propagation.  The next patch will change this.
    
    No shader-db changes on any Intel platform.
    
    v2: Fix typo in comment in test case subtract_delete_compare_other_flag.
    Noticed by Caio.
    Reviewed-by: Caio Marcelo de Oliveira Filho's avatarCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    Reviewed-by: Matt Turner's avatarMatt Turner <mattst88@gmail.com>
    8030cb75
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