1. 28 Oct, 2020 1 commit
    • Jason Ekstrand's avatar
      nir: Add an LOD parameter to image_*_size · 5604c310
      Jason Ekstrand authored
      
      
      The OpenCL image_width/height/depth functions have variants which can
      take an LOD parameter.  More importantly, LLVM-SPIRV-Translator always
      generates OpImageQuerySizeLod even if the LOD is guaranteed to be zero.
      Given that over half the hardware out there has an LOD field for image
      size queries (based on a rudimentary scan through their NIR -> whatever
      code), we may as well just add the source to the NIR intrinsic.  If this
      is ever a problem for anyone, the lowering is pretty trivial.
      
      I've also added asserts to everyone's drivers that should alert them if
      they ever see an LOD other than zero.  This will never happen with GL or
      Vulkan so there's no need for panic.
      Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      5604c310
  2. 05 Aug, 2020 1 commit
    • Emma Anholt's avatar
      freedreno: Fix non-constbuf-upload UBO block indices and count. · a60a228b
      Emma Anholt authored
      The nir_analyze_ubo_ranges pass removes all UBO block 0 loads to reverse
      what nir_lower_uniforms_to_ubo() had done, and we only upload UBO pointers
      to the HW for UBO block 1-N, so let's just fix up the shader state.
      
      Fixes an off by one in const state layout setup, and some really dodgy
      register addressing trying to deal with dynamic UBO indices when the UBO
      pointers happen to be at the start of the constbuf.
      
      There's no fixes tag, though this fixes a bug from September, because it
      would require the num_ubos fix in nir_lower_uniforms_to_ubo.
      a60a228b
  3. 15 Apr, 2020 1 commit
    • Connor Abbott's avatar
      ir3: Fix LDC offset units · abcfb643
      Connor Abbott authored
      I had missed that LDC actually uses vec4 units for its offset. This
      means that we have to create a new instruction, and lower it in
      ir3_nir_lower_io_offsets, similar to the existing SSBO instructions.
      Unfortunately we can't assume that loads are always vec4-aligned, so we
      have to use the alignment information that NIR gives us. Unfortunately,
      it's currently woefully inadequate, and will have to be fixed to give us
      good codegen in the future.
      
      Part-of: <mesa/mesa!4568>
      abcfb643
  4. 14 Apr, 2020 2 commits
  5. 13 Apr, 2020 3 commits
    • Rob Clark's avatar
      freedreno/ir3: rename depth->dce · 751c11a8
      Rob Clark authored
      
      
      Since DCE is the only remaining function of this pass, after the pre-RA
      scheduler rewrite.
      Signed-off-by: Rob Clark's avatarRob Clark <robdclark@chromium.org>
      Part-of: <mesa/mesa!4440>
      751c11a8
    • Emma Anholt's avatar
      freedreno/ir3: CSE the up/downconversion of SEL's cond's size. · 95d4a956
      Emma Anholt authored
      Not many programs hit this, but if you were, say, selecting between vec4s,
      you'd convert the cond 4 times.
      
      instructions in affected programs: 2957 -> 2717 (-8.12%)
      nops in affected programs: 989 -> 899 (-9.10%)
      non-nops in affected programs: 1968 -> 1818 (-7.62%)
      dwords in affected programs: 3232 -> 2752 (-14.85%)
      last-baryf in affected programs: 102 -> 90 (-11.76%)
      full in affected programs: 5 -> 4 (-20.00%)
      sstall in affected programs: 329 -> 329 (0.00%)
      (ss) in affected programs: 86 -> 105 (22.09%)
      (sy) in affected programs: 14 -> 12 (-14.29%)
      
      Part-of: <mesa/mesa!4516>
      95d4a956
    • Emma Anholt's avatar
      freedreno/ir3: Stop doing b2n on the SEL condition. · 82375cca
      Emma Anholt authored
      SEL_B32 (and presumably B16) checks for 0 or nonzero in the condition
      (tested by just stuffing a uniform's value into it), so there's no need to
      do ir3_b2n() on it, or any preceding ir3_n2b().
      
      instructions in affected programs: 664444 -> 659927 (-0.68%)
      nops in affected programs: 267898 -> 266312 (-0.59%)
      non-nops in affected programs: 420260 -> 417329 (-0.70%)
      dwords in affected programs: 144032 -> 137568 (-4.49%)
      last-baryf in affected programs: 10801 -> 10321 (-4.44%)
      full in affected programs: 2003 -> 2002 (-0.05%)
      sstall in affected programs: 76670 -> 77405 (0.96%)
      (ss) in affected programs: 4515 -> 4525 (0.22%)
      (sy) in affected programs: 612 -> 604 (-1.31%)
      
      Part-of: <mesa/mesa!4516>
      82375cca
  6. 09 Apr, 2020 2 commits
  7. 31 Mar, 2020 1 commit
  8. 27 Mar, 2020 2 commits
  9. 19 Mar, 2020 1 commit
    • Emma Anholt's avatar
      freedreno: Switch to exposing only half-integer pixel centers. · 5b57aa79
      Emma Anholt authored
      This is what the HW provides us.  If we need integer pixel centers, we
      want the state tracker to do the lowering pass so that it gets to optimize
      on the subtract.  This is also the shader instructions that the blob is
      doing on GLES, and is what Vulkan wants too, as was noted in MR !4172.
      
      shader-db on a630:
      total instructions in shared programs: 186689 -> 186168 (-0.28%)
      total nops in shared programs: 66253 -> 66139 (-0.17%)
      total non-nops in shared programs: 120436 -> 120029 (-0.34%)
      total dwords in shared programs: 292192 -> 291168 (-0.35%)
      total last-baryf in shared programs: 4810 -> 4734 (-1.58%)
      total full in shared programs: 10176 -> 10195 (0.19%)
      total constlen in shared programs: 54589 -> 54575 (-0.03%)
      total sstall in shared programs: 24582 -> 24802 (0.89%)
      total (ss) in shared programs: 3921 -> 3925 (0.10%)
      total (sy) in shared programs: 1934 -> 1923 (-0.57%)
      
      Tested-by: Marge Bot <mesa/mesa!4223>
      Part-of: <mesa/mesa!4223>
      5b57aa79
  10. 28 Feb, 2020 1 commit
  11. 24 Feb, 2020 3 commits
  12. 01 Feb, 2020 5 commits
  13. 29 Jan, 2020 1 commit
  14. 23 Jan, 2020 2 commits
  15. 22 Jan, 2020 1 commit
  16. 15 Jan, 2020 1 commit
  17. 13 Jan, 2020 2 commits
  18. 24 Dec, 2019 1 commit
  19. 19 Dec, 2019 2 commits
  20. 17 Dec, 2019 1 commit
  21. 13 Dec, 2019 2 commits
  22. 04 Dec, 2019 1 commit
  23. 20 Nov, 2019 3 commits