1. 04 May, 2016 37 commits
  2. 03 May, 2016 3 commits
    • Kenneth Graunke's avatar
      i965: Write a scalar TCS backend that runs in SINGLE_PATCH mode. · 7d9143ad
      Kenneth Graunke authored
      
      
      Unlike most shader stages, the Hull Shader hardware makes us explicitly
      tell it how many threads to dispatch and manually configure the channel
      mask.  One perk of this is that we have a lot of flexibility - we can
      run it in either SIMD4x2 or SIMD8 mode.
      
      Treating it as SIMD8 means that shaders with 8 or fewer output vertices
      (which is overwhemingly the common case) can be handled by a single
      thread.  This has several intriguing properties:
      
      - Accessing input arrays with gl_InvocationID as the index is a simple
        SIMD8 URB read with g1 as the header.  No indirect addressing required.
      - Barriers are no-ops.
      - We could potentially do output shadowing to combine writes, as the
        concurrency concerns are gone.  (We don't do this yet, though.)
      
      v2: Drop first_non_payload_grf change, as it was always adding 0
          (caught by Jordan Justen).
      Signed-off-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      Reviewed-by: Jordan Justen's avatarJordan Justen <jordan.l.justen@intel.com>
      7d9143ad
    • Kenneth Graunke's avatar
      i965: Rework the TCS passthrough shader to use NIR. · 75881bed
      Kenneth Graunke authored
      
      
      I'm about to implement a scalar TCS backend, and I'd rather not
      duplicate all of this code there.
      
      One change is that we now write the tessellation levels from all
      TCS threads, rather than just the first.  This is pretty harmless,
      and was easier.  The IF/ENDIF needed for that are gone; otherwise
      the generated code is basically identical.
      
      I chose to emit load/store intrinsics directly because it was easier.
      Signed-off-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      Reviewed-by: Jordan Justen's avatarJordan Justen <jordan.l.justen@intel.com>
      75881bed
    • Brian Paul's avatar
      gallium/util: change assertion to conditional in util_bitmask_destroy() · ef5a31fc
      Brian Paul authored
      
      
      If we fail to create a context in the VMware driver we call this function
      unconditionally to free a bunch of bit vectors.  Instead of asserting on
      a null pointer, just no-op.
      Reviewed-by: Jose Fonseca's avatarJose Fonseca <jfonseca@vmware.com>
      ef5a31fc