Commit 9f581f8f authored by Jordan Justen's avatar Jordan Justen

i965: Add brw_store_register_mem32

Signed-off-by: Jordan Justen's avatarJordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
parent c54e5c2f
......@@ -1448,6 +1448,8 @@ void brw_load_register_mem64(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t read_domains, uint32_t write_domain,
uint32_t offset);
void brw_store_register_mem32(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, uint32_t offset);
void brw_store_register_mem64(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, uint32_t offset);
......
......@@ -538,6 +538,32 @@ brw_load_register_mem64(struct brw_context *brw,
load_sized_register_mem(brw, reg, bo, read_domains, write_domain, offset, 2);
}
/*
* Write an arbitrary 32-bit register to a buffer via MI_STORE_REGISTER_MEM.
*/
void
brw_store_register_mem32(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, uint32_t offset)
{
assert(brw->gen >= 6);
if (brw->gen >= 8) {
BEGIN_BATCH(4);
OUT_BATCH(MI_STORE_REGISTER_MEM | (4 - 2));
OUT_BATCH(reg);
OUT_RELOC64(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
offset);
ADVANCE_BATCH();
} else {
BEGIN_BATCH(3);
OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
OUT_BATCH(reg);
OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
offset);
ADVANCE_BATCH();
}
}
/*
* Write an arbitrary 64-bit register to a buffer via MI_STORE_REGISTER_MEM.
*/
......
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