From 42e6ee50fe533f9d1ef17b16fff11ca3aafaf1bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= <mairacanal@riseup.net> Date: Tue, 5 Jul 2022 20:17:34 -0300 Subject: [PATCH] drm/amd/display: Introduce KUnit tests to the display_mode_vba library MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The display_mode_vba library deals with hundreds of display parameters and sometimes does it in odd ways. The addition of unit tests intends to assure the quality of the code delivered by HW engineers and, also make it possible to refactor the code decreasing concerns about adding bugs to the codebase. Signed-off-by: Maíra Canal <mairacanal@riseup.net> Co-developed-by: Tales Aparecida <tales.aparecida@gmail.com> Signed-off-by: Tales Aparecida <tales.aparecida@gmail.com> --- .../gpu/drm/amd/display/tests/dc/dml/Makefile | 4 +- .../tests/dc/dml/display_mode_vba_test.c | 126 +++++++ .../tests/dc/dml/display_mode_vba_test.h | 42 +++ .../drm/amd/display/tests/dc/dml/vba_tests.c | 341 ++++++++++++++++++ 4 files changed, 511 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.h create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dml/vba_tests.c diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/Makefile b/drivers/gpu/drm/amd/display/tests/dc/dml/Makefile index 9e336e610be93..f5c366c46fee9 100644 --- a/drivers/gpu/drm/amd/display/tests/dc/dml/Makefile +++ b/drivers/gpu/drm/amd/display/tests/dc/dml/Makefile @@ -3,10 +3,10 @@ # Makefile for the KUnit Tests for DML # -DML_TESTS = calcs/bw_fixed_test.o +DML_TESTS = calcs/bw_fixed_test.o display_mode_vba_test.o AMD_DAL_DML_TESTS = $(addprefix $(AMDDALPATH)/tests/dc/dml/,$(DML_TESTS)) AMD_DISPLAY_FILES += $(AMD_DAL_DML_TESTS) -DML_TEST_MODULES = dml_calcs_tests.o +DML_TEST_MODULES = dml_calcs_tests.o vba_tests.o AMD_DAL_DML_TEST_MODULES = $(addprefix $(AMDDALPATH)/tests/dc/dml/,$(DML_TEST_MODULES)) obj-$(CONFIG_DML_KUNIT_TEST) += $(AMD_DAL_DML_TEST_MODULES) diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c new file mode 100644 index 0000000000000..9473037bf415c --- /dev/null +++ b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: MIT +/* + * KUnit tests for dml/display_mode_vba.h + * + * Copyright (C) 2022, Maíra Canal <mairacanal@riseup.net> + */ + +#include <drm/drm_util.h> +#include "display_mode_vba_test.h" + +/** + * pclk_adjustment_for_progressive_to_interlace_unit_test - KUnit test + * for PixelClockAdjustmentForProgressiveToInterlaceUnit + * @test: represents a running instance of a test. + */ +void pclk_adjustment_for_progressive_to_interlace_unit_test(struct kunit *test) +{ + const struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case + *test_param = test->param_value; + struct display_mode_lib *mode_lib; + size_t pixel_clock_size = DC__NUM_DPP__MAX * sizeof(const double); + size_t interlace_size = DC__NUM_DPP__MAX * sizeof(const bool); + + mode_lib = kunit_kzalloc(test, sizeof(struct display_mode_lib), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, mode_lib); + + mode_lib->vba.NumberOfActivePlanes = test_param->number_of_active_planes; + memcpy(mode_lib->vba.Interlace, test_param->interlace, interlace_size); + mode_lib->vba.ProgressiveToInterlaceUnitInOPP = test_param->progressive_to_interlace_unit_in_OPP; + memcpy(mode_lib->vba.PixelClock, test_param->pixel_clock, pixel_clock_size); + + PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib); + + KUNIT_EXPECT_TRUE(test, !memcmp(mode_lib->vba.PixelClock, + test_param->expected.pixel_clock, pixel_clock_size)); + KUNIT_EXPECT_TRUE(test, !memcmp(mode_lib->vba.PixelClockBackEnd, + test_param->expected.pixel_clock_backend, + pixel_clock_size)); +} +EXPORT_SYMBOL_FOR_TESTS_ONLY(pclk_adjustment_for_progressive_to_interlace_unit_test); + +/** + * calculate_256B_block_sizes_test - KUnit test for Calculate256BBlockSizes + * @test: represents a running instance of a test. + */ +void calculate_256B_block_sizes_test(struct kunit *test) +{ + const struct calculate_256B_block_sizes_test_case *test_param = test->param_value; + unsigned int *block_height_256_bytes_Y, *block_height_256_bytes_C; + unsigned int *block_width_256_bytes_Y, *block_width_256_bytes_C; + + block_height_256_bytes_Y = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, block_height_256_bytes_Y); + + block_height_256_bytes_C = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, block_height_256_bytes_C); + + block_width_256_bytes_Y = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, block_width_256_bytes_Y); + + block_width_256_bytes_C = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, block_width_256_bytes_C); + + Calculate256BBlockSizes(test_param->source_pixel_format, + test_param->surface_tiling, test_param->byte_per_pixel_Y, + test_param->byte_per_pixel_C, block_height_256_bytes_Y, + block_height_256_bytes_C, block_width_256_bytes_Y, + block_width_256_bytes_C); + + KUNIT_EXPECT_EQ(test, *block_height_256_bytes_Y, test_param->block_height_256_bytes_Y); + KUNIT_EXPECT_EQ(test, *block_height_256_bytes_C, test_param->block_height_256_bytes_C); + KUNIT_EXPECT_EQ(test, *block_width_256_bytes_Y, test_param->block_width_256_bytes_Y); + KUNIT_EXPECT_EQ(test, *block_width_256_bytes_C, test_param->block_width_256_bytes_C); +} +EXPORT_SYMBOL_FOR_TESTS_ONLY(calculate_256B_block_sizes_test); + +/** + * calculate_min_and_max_prefetch_mode_test - KUnit test for CalculateMinAndMaxPrefetchMode + * @test: represents a running instance of a test. + */ +void calculate_min_and_max_prefetch_mode_test(struct kunit *test) +{ + unsigned int *min_prefetch_mode, *max_prefetch_mode; + + min_prefetch_mode = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, min_prefetch_mode); + + max_prefetch_mode = kunit_kzalloc(test, sizeof(unsigned int), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, max_prefetch_mode); + + /* Try to allow DRAM self-refresh and MCLK switch */ + KUNIT_EXPECT_FALSE(test, + CalculateMinAndMaxPrefetchMode(dm_try_to_allow_self_refresh_and_mclk_switch, + min_prefetch_mode, max_prefetch_mode)); + KUNIT_EXPECT_EQ(test, *min_prefetch_mode, 0); + KUNIT_EXPECT_EQ(test, *max_prefetch_mode, 2); + + /* Allow DRAM self-refresh and MCLK switch */ + KUNIT_EXPECT_FALSE(test, + CalculateMinAndMaxPrefetchMode(dm_allow_self_refresh_and_mclk_switch, + min_prefetch_mode, max_prefetch_mode)); + KUNIT_EXPECT_EQ(test, *min_prefetch_mode, 0); + KUNIT_EXPECT_EQ(test, *max_prefetch_mode, 0); + + /* Allow only DRAM self-refresh */ + KUNIT_EXPECT_FALSE(test, + CalculateMinAndMaxPrefetchMode(dm_allow_self_refresh, min_prefetch_mode, + max_prefetch_mode)); + KUNIT_EXPECT_EQ(test, *min_prefetch_mode, 1); + KUNIT_EXPECT_EQ(test, *max_prefetch_mode, 1); + + /* Allow neither DRAM self-refresh nor MCLK switch */ + KUNIT_EXPECT_FALSE(test, + CalculateMinAndMaxPrefetchMode(dm_neither_self_refresh_nor_mclk_switch, + min_prefetch_mode, max_prefetch_mode)); + KUNIT_EXPECT_EQ(test, *min_prefetch_mode, 2); + KUNIT_EXPECT_EQ(test, *max_prefetch_mode, 2); + + /* Invalid self-refresh affinity */ + KUNIT_EXPECT_TRUE(test, + CalculateMinAndMaxPrefetchMode(-1, + min_prefetch_mode, max_prefetch_mode)); + KUNIT_EXPECT_EQ(test, *min_prefetch_mode, 0); + KUNIT_EXPECT_EQ(test, *max_prefetch_mode, 2); +} +EXPORT_SYMBOL_FOR_TESTS_ONLY(calculate_min_and_max_prefetch_mode_test); diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.h b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.h new file mode 100644 index 0000000000000..6c783f50f8ad9 --- /dev/null +++ b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: MIT */ +/* + * KUnit tests for dml/display_mode_vba.h + * + * Copyright (C) 2022, Maíra Canal <mairacanal@riseup.net> + */ + +#include <kunit/test.h> + +#include "../../dml/display_mode_structs.h" +#include "../../dml/display_mode_lib.h" +#include "../../dml/display_mode_vba.h" + +struct pixel_clock_adjustment_for_progressive_to_interlace_unit_expected { + const double pixel_clock[DC__NUM_DPP__MAX]; + const double pixel_clock_backend[DC__NUM_DPP__MAX]; +}; + +struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case { + const char *desc; + const unsigned int number_of_active_planes; + const bool interlace[DC__NUM_DPP__MAX]; + const bool progressive_to_interlace_unit_in_OPP; + const double pixel_clock[DC__NUM_DPP__MAX]; + const struct pixel_clock_adjustment_for_progressive_to_interlace_unit_expected expected; +}; + +struct calculate_256B_block_sizes_test_case { + const char *desc; + const enum source_format_class source_pixel_format; + const enum dm_swizzle_mode surface_tiling; + const unsigned int byte_per_pixel_Y; + const unsigned int byte_per_pixel_C; + const unsigned int block_height_256_bytes_Y; + const unsigned int block_height_256_bytes_C; + const unsigned int block_width_256_bytes_Y; + const unsigned int block_width_256_bytes_C; +}; + +void pclk_adjustment_for_progressive_to_interlace_unit_test(struct kunit *test); +void calculate_256B_block_sizes_test(struct kunit *test); +void calculate_min_and_max_prefetch_mode_test(struct kunit *test); diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/vba_tests.c b/drivers/gpu/drm/amd/display/tests/dc/dml/vba_tests.c new file mode 100644 index 0000000000000..a0b8678604a65 --- /dev/null +++ b/drivers/gpu/drm/amd/display/tests/dc/dml/vba_tests.c @@ -0,0 +1,341 @@ +// SPDX-License-Identifier: MIT +/* + * KUnit tests for dml/display_mode_vba.h + * + * Copyright (C) 2022, Maíra Canal <mairacanal@riseup.net> + */ + +#include <kunit/test.h> + +#include "display_mode_vba_test.h" + +const static struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case +pixel_clock_adjustment_for_progressive_to_interlace_unit_cases[] = { + { + .desc = "No active planes", + .number_of_active_planes = 0, + .interlace = {false, false, false, false, false, false, false, false}, + .progressive_to_interlace_unit_in_OPP = false, + .pixel_clock = {0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .expected = { + .pixel_clock = {0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .pixel_clock_backend = {0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + }, + }, + { + .desc = "Two active planes with no interlaced output", + .number_of_active_planes = 2, + .interlace = {false, false, false, false, false, false, false, false}, + .progressive_to_interlace_unit_in_OPP = true, + .pixel_clock = {3200.00, 1360.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .expected = { + .pixel_clock = {3200.00, 1360.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .pixel_clock_backend = {3200.00, 1360.00, 0.00, 0.00, 0.00, 0.00, + 0.00, 0.00}, + }, + }, + { + .desc = "Three active planes with one interlaced plane", + .number_of_active_planes = 3, + .interlace = {false, true, false, false, false, false, false, false}, + .progressive_to_interlace_unit_in_OPP = true, + .pixel_clock = {3200.00, 1360.00, 400.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .expected = { + .pixel_clock = {3200.00, 2720.00, 400.00, 0.00, 0.00, 0.00, 0.00, 0.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 0.00, 0.00, 0.00, + 0.00, 0.00}, + }, + }, + { + .desc = "Five active planes with three interlaced planes", + .number_of_active_planes = 5, + .interlace = {false, true, false, true, true, false, false, false}, + .progressive_to_interlace_unit_in_OPP = true, + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 0.00, 0.00, 0.00}, + .expected = { + .pixel_clock = {3200.00, 2720.00, 400.00, 680.00, 1360.00, 0.00, 0.00, + 0.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 340.00, 680.00, 0.00, + 0.00, 0.00}, + }, + }, + { + .desc = "Eight active planes with five interlaced planes", + .number_of_active_planes = 8, + .interlace = {true, true, false, true, true, false, true, false}, + .progressive_to_interlace_unit_in_OPP = true, + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, 2720.00, 340.00}, + .expected = { + .pixel_clock = {6400.00, 2720.00, 400.00, 680.00, 1360.00, 1360.00, 5440.00, + 340.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, + 2720.00, 340.0}, + }, + }, + { + .desc = "Eight active planes with all planes interlaced", + .number_of_active_planes = 8, + .interlace = {true, true, true, true, true, true, true, true}, + .progressive_to_interlace_unit_in_OPP = true, + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, 2720.00, 340.00}, + .expected = { + .pixel_clock = {6400.00, 2720.00, 800.0, 680.00, 1360.00, 2720.00, 5440.0, + 680.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, + 2720.00, 340.00}, + }, + }, + { + .desc = "Eight active planes with no interlaced plane", + .number_of_active_planes = 8, + .interlace = {false, false, false, false, false, false, false, false}, + .progressive_to_interlace_unit_in_OPP = false, + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, 2720.00, 340.00}, + .expected = { + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, + 2720.00, 340.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, + 2720.00, 340.00}, + }, + }, + { + .desc = "Eight active planes with no progressive_to_interlace_unit_in_OPP", + .number_of_active_planes = 8, + .interlace = {true, true, true, true, true, true, true, true}, + .progressive_to_interlace_unit_in_OPP = false, + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, 2720.00, 340.00}, + .expected = { + .pixel_clock = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, 2720.00, + 340.00}, + .pixel_clock_backend = {3200.00, 1360.00, 400.00, 340.00, 680.00, 1360.00, + 2720.00, 340.00}, + }, + }, +}; + +const static struct calculate_256B_block_sizes_test_case +calculate_256B_block_sizes_cases[] = { + /* + * Here 16-bit specifies the number of bits in the horizontal 4-element region + * used for subsampling + */ + { + .desc = "4:4:4 16-bit encoding with linear swizzle", + .source_pixel_format = dm_444_16, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 2, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 128, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "4:4:4 16-bit encoding with 256B standard swizzle", + .source_pixel_format = dm_444_16, + .surface_tiling = dm_sw_256b_s, + .byte_per_pixel_Y = 2, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 8, + .block_width_256_bytes_Y = 16, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + /* + * Here 32-bit specifies the number of bits in the horizontal 4-element region + * used for subsampling + */ + { + .desc = "4:4:4 32-bit encoding with linear swizzle", + .source_pixel_format = dm_444_32, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 4, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 64, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "4:4:4 32-bit encoding with 256B display swizzle", + .source_pixel_format = dm_444_32, + .surface_tiling = dm_sw_256b_d, + .byte_per_pixel_Y = 4, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 8, + .block_width_256_bytes_Y = 8, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + /* + * Here 64-bit specifies the number of bits in the horizontal 4-element region + * used for subsampling + */ + { + .desc = "4:4:4 64-bit encoding with linear swizzle", + .source_pixel_format = dm_444_64, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 8, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 32, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "4:4:4 64-bit encoding with 4KB standard swizzle", + .source_pixel_format = dm_444_64, + .surface_tiling = dm_sw_4kb_s, + .byte_per_pixel_Y = 8, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 4, + .block_width_256_bytes_Y = 8, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "4:4:4 8-bit encoding with linear swizzle", + .source_pixel_format = dm_444_8, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 256, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "4:4:4 8-bit encoding with 4KB display swizzle", + .source_pixel_format = dm_444_8, + .surface_tiling = dm_sw_4kb_d, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 16, + .block_width_256_bytes_Y = 16, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "8-bit mono encoding with linear swizzle", + .source_pixel_format = dm_mono_8, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 256, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "8-bit mono encoding with 64KB standard swizzle", + .source_pixel_format = dm_mono_8, + .surface_tiling = dm_sw_64kb_s, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 16, + .block_width_256_bytes_Y = 16, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "16-bit mono encoding with linear swizzle", + .source_pixel_format = dm_mono_16, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 2, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 128, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "16-bit mono encoding with 64KB display swizzle", + .source_pixel_format = dm_mono_16, + .surface_tiling = dm_sw_64kb_d, + .byte_per_pixel_Y = 2, + .byte_per_pixel_C = 0, + .block_height_256_bytes_Y = 8, + .block_width_256_bytes_Y = 16, + .block_height_256_bytes_C = 0, + .block_width_256_bytes_C = 0, + }, + { + .desc = "8-bit 4:2:0 encoding with linear swizzle", + .source_pixel_format = dm_420_8, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 2, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 256, + .block_height_256_bytes_C = 1, + .block_width_256_bytes_C = 128, + }, + { + .desc = "8-bit 4:2:0 encoding with VAR standard swizzle", + .source_pixel_format = dm_420_8, + .surface_tiling = dm_sw_var_s, + .byte_per_pixel_Y = 1, + .byte_per_pixel_C = 2, + .block_height_256_bytes_Y = 16, + .block_width_256_bytes_Y = 16, + .block_height_256_bytes_C = 8, + .block_width_256_bytes_C = 16, + }, + { + .desc = "10-bit 4:2:0 encoding with linear swizzle", + .source_pixel_format = dm_420_10, + .surface_tiling = dm_sw_linear, + .byte_per_pixel_Y = 4.0 / 3.0, + .byte_per_pixel_C = 8.0 / 3.0, + .block_height_256_bytes_Y = 1, + .block_width_256_bytes_Y = 256, + .block_height_256_bytes_C = 1, + .block_width_256_bytes_C = 128, + }, + { + .desc = "10-bit 4:2:0 encoding with VAR display swizzle", + .source_pixel_format = dm_420_10, + .surface_tiling = dm_sw_var_d, + .byte_per_pixel_Y = 4.0 / 3.0, + .byte_per_pixel_C = 8.0 / 3.0, + .block_height_256_bytes_Y = 8, + .block_width_256_bytes_Y = 32, + .block_height_256_bytes_C = 8, + .block_width_256_bytes_C = 16, + }, +}; + +static void pixel_clock_adjustment_for_progressive_to_interlace_unit_test_to_desc +(const struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case *t, char *desc) +{ + strcpy(desc, t->desc); +} + +KUNIT_ARRAY_PARAM(pixel_clock_adjustment_for_progressive_to_interlace_unit, + pixel_clock_adjustment_for_progressive_to_interlace_unit_cases, + pixel_clock_adjustment_for_progressive_to_interlace_unit_test_to_desc); + +static void calculate_256B_block_sizes_test_to_desc(const struct + calculate_256B_block_sizes_test_case * t, char *desc) +{ + strcpy(desc, t->desc); +} + +KUNIT_ARRAY_PARAM(calculate_256B_block_sizes, calculate_256B_block_sizes_cases, + calculate_256B_block_sizes_test_to_desc); + +static struct kunit_case display_mode_vba_test_cases[] = { + KUNIT_CASE_PARAM(pclk_adjustment_for_progressive_to_interlace_unit_test, + pixel_clock_adjustment_for_progressive_to_interlace_unit_gen_params), + KUNIT_CASE_PARAM(calculate_256B_block_sizes_test, calculate_256B_block_sizes_gen_params), + KUNIT_CASE(calculate_min_and_max_prefetch_mode_test), + { } +}; + +static struct kunit_suite display_mode_vba_test_suite = { + .name = "dml_display_mode_vba", + .test_cases = display_mode_vba_test_cases, +}; + +kunit_test_suite(display_mode_vba_test_suite); +MODULE_LICENSE("Dual MIT/GPL"); -- GitLab