Commit 61e86365 authored by Anuj Phogat's avatar Anuj Phogat Committed by Marge Bot
Browse files

intel: Rename gen_device prefix to intel_device



export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen_device" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_device/intel_device/g"
Signed-off-by: Anuj Phogat's avatarAnuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
Part-of: <!10241>
parent cd39d3b1
......@@ -541,7 +541,7 @@ finish_seqno(struct iris_batch *batch)
static void
iris_finish_batch(struct iris_batch *batch)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
if (devinfo->ver == 12 && batch->name == IRIS_BATCH_RENDER) {
/* We re-emit constants at the beginning of every batch as a hardware
......
......@@ -284,7 +284,7 @@ tex_cache_flush_hack(struct iris_batch *batch,
enum isl_format view_format,
enum isl_format surf_format)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
/* The WaSamplerCacheFlushBetweenRedescribedSurfaceReads workaround says:
*
......@@ -351,7 +351,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
{
struct iris_context *ice = (void *) ctx;
struct iris_screen *screen = (struct iris_screen *)ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
enum blorp_batch_flags blorp_flags = 0;
......@@ -552,7 +552,7 @@ get_copy_region_aux_settings(struct iris_context *ice,
bool is_render_target)
{
struct iris_screen *screen = (void *) ice->ctx.screen;
struct gen_device_info *devinfo = &screen->devinfo;
struct intel_device_info *devinfo = &screen->devinfo;
switch (res->aux.usage) {
case ISL_AUX_USAGE_HIZ:
......
......@@ -1882,7 +1882,7 @@ gem_param(int fd, int name)
* \param fd File descriptor of the opened DRM device.
*/
static struct iris_bufmgr *
iris_bufmgr_create(struct gen_device_info *devinfo, int fd, bool bo_reuse)
iris_bufmgr_create(struct intel_device_info *devinfo, int fd, bool bo_reuse)
{
uint64_t gtt_size = iris_gtt_size(fd);
if (gtt_size <= IRIS_MEMZONE_OTHER_START)
......@@ -1988,7 +1988,7 @@ iris_bufmgr_unref(struct iris_bufmgr *bufmgr)
* \param fd File descriptor of the opened DRM device.
*/
struct iris_bufmgr *
iris_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd, bool bo_reuse)
iris_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd, bool bo_reuse)
{
struct stat st;
......
......@@ -35,7 +35,7 @@
#include "pipe/p_defines.h"
struct iris_batch;
struct gen_device_info;
struct intel_device_info;
struct pipe_debug_callback;
/**
......@@ -370,7 +370,7 @@ int iris_bo_busy(struct iris_bo *bo);
int iris_bo_madvise(struct iris_bo *bo, int madv);
/* drm_bacon_bufmgr_gem.c */
struct iris_bufmgr *iris_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd,
struct iris_bufmgr *iris_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd,
bool bo_reuse);
int iris_bufmgr_get_fd(struct iris_bufmgr *bufmgr);
......
......@@ -41,7 +41,7 @@ iris_is_color_fast_clear_compatible(struct iris_context *ice,
const union isl_color_value color)
{
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
if (isl_format_has_int_channel(format)) {
perf_debug(&ice->dbg, "Integer fast clear not enabled for %s\n",
......@@ -343,7 +343,7 @@ clear_color(struct iris_context *ice,
struct iris_resource *res = (void *) p_res;
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
enum blorp_batch_flags blorp_flags = 0;
if (render_condition_enabled) {
......@@ -415,7 +415,7 @@ can_fast_clear_depth(struct iris_context *ice,
struct pipe_resource *p_res = (void *) res;
struct pipe_context *ctx = (void *) ice;
struct iris_screen *screen = (void *) ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
return false;
......@@ -697,7 +697,7 @@ iris_clear_texture(struct pipe_context *ctx,
struct iris_context *ice = (void *) ctx;
struct iris_screen *screen = (void *) ctx->screen;
struct iris_resource *res = (void *) p_res;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (iris_resource_unfinished_aux_import(res))
iris_resource_finish_aux_import(ctx->screen, res);
......
......@@ -270,7 +270,7 @@ struct pipe_context *
iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
{
struct iris_screen *screen = (struct iris_screen*)pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_context *ice = rzalloc(NULL, struct iris_context);
if (!ice)
......
......@@ -254,7 +254,7 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info,
struct iris_context *ice = (struct iris_context *) ctx;
struct iris_screen *screen = (struct iris_screen*)ice->ctx.screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
......
......@@ -35,7 +35,7 @@
#include "iris_screen.h"
struct iris_format_info
iris_format_for_usage(const struct gen_device_info *devinfo,
iris_format_for_usage(const struct intel_device_info *devinfo,
enum pipe_format pformat,
isl_surf_usage_flags_t usage)
{
......@@ -111,7 +111,7 @@ iris_is_format_supported(struct pipe_screen *pscreen,
unsigned usage)
{
struct iris_screen *screen = (struct iris_screen *) pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
uint32_t max_samples = devinfo->ver == 8 ? 8 : 16;
if (sample_count > max_samples ||
......
......@@ -61,7 +61,7 @@ get_new_program_id(struct iris_screen *screen)
}
static struct brw_vs_prog_key
iris_to_brw_vs_key(const struct gen_device_info *devinfo,
iris_to_brw_vs_key(const struct intel_device_info *devinfo,
const struct iris_vs_prog_key *key)
{
return (struct brw_vs_prog_key) {
......@@ -75,7 +75,7 @@ iris_to_brw_vs_key(const struct gen_device_info *devinfo,
}
static struct brw_tcs_prog_key
iris_to_brw_tcs_key(const struct gen_device_info *devinfo,
iris_to_brw_tcs_key(const struct intel_device_info *devinfo,
const struct iris_tcs_prog_key *key)
{
return (struct brw_tcs_prog_key) {
......@@ -89,7 +89,7 @@ iris_to_brw_tcs_key(const struct gen_device_info *devinfo,
}
static struct brw_tes_prog_key
iris_to_brw_tes_key(const struct gen_device_info *devinfo,
iris_to_brw_tes_key(const struct intel_device_info *devinfo,
const struct iris_tes_prog_key *key)
{
return (struct brw_tes_prog_key) {
......@@ -100,7 +100,7 @@ iris_to_brw_tes_key(const struct gen_device_info *devinfo,
}
static struct brw_gs_prog_key
iris_to_brw_gs_key(const struct gen_device_info *devinfo,
iris_to_brw_gs_key(const struct intel_device_info *devinfo,
const struct iris_gs_prog_key *key)
{
return (struct brw_gs_prog_key) {
......@@ -109,7 +109,7 @@ iris_to_brw_gs_key(const struct gen_device_info *devinfo,
}
static struct brw_wm_prog_key
iris_to_brw_fs_key(const struct gen_device_info *devinfo,
iris_to_brw_fs_key(const struct intel_device_info *devinfo,
const struct iris_fs_prog_key *key)
{
return (struct brw_wm_prog_key) {
......@@ -130,7 +130,7 @@ iris_to_brw_fs_key(const struct gen_device_info *devinfo,
}
static struct brw_cs_prog_key
iris_to_brw_cs_key(const struct gen_device_info *devinfo,
iris_to_brw_cs_key(const struct intel_device_info *devinfo,
const struct iris_cs_prog_key *key)
{
return (struct brw_cs_prog_key) {
......@@ -385,7 +385,7 @@ iris_setup_uniforms(const struct brw_compiler *compiler,
unsigned *out_num_system_values,
unsigned *out_num_cbufs)
{
UNUSED const struct gen_device_info *devinfo = compiler->devinfo;
UNUSED const struct intel_device_info *devinfo = compiler->devinfo;
unsigned system_values_start = ALIGN(kernel_input_size, sizeof(uint32_t));
......@@ -790,7 +790,7 @@ skip_compacting_binding_tables(void)
* Set up the binding table indices and apply to the shader.
*/
static void
iris_setup_binding_table(const struct gen_device_info *devinfo,
iris_setup_binding_table(const struct intel_device_info *devinfo,
struct nir_shader *nir,
struct iris_binding_table *bt,
unsigned num_render_targets,
......@@ -1030,7 +1030,7 @@ iris_debug_recompile(struct iris_screen *screen,
|| list_is_singular(&ish->variants))
return;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
const struct brw_compiler *c = screen->compiler;
const struct shader_info *info = &ish->nir->info;
......@@ -1161,7 +1161,7 @@ iris_compile_vs(struct iris_screen *screen,
const struct iris_vs_prog_key *key)
{
const struct brw_compiler *compiler = screen->compiler;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
void *mem_ctx = ralloc_context(NULL);
struct brw_vs_prog_data *vs_prog_data =
rzalloc(mem_ctx, struct brw_vs_prog_data);
......@@ -1341,7 +1341,7 @@ iris_compile_tcs(struct iris_screen *screen,
rzalloc(mem_ctx, struct brw_tcs_prog_data);
struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base;
struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
enum brw_param_builtin *system_values = NULL;
unsigned num_system_values = 0;
unsigned num_cbufs = 0;
......@@ -1437,7 +1437,7 @@ iris_update_compiled_tcs(struct iris_context *ice)
struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
struct u_upload_mgr *uploader = ice->shaders.uploader_driver;
const struct brw_compiler *compiler = screen->compiler;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
const struct shader_info *tes_info =
iris_get_shader_info(ice, MESA_SHADER_TESS_EVAL);
......@@ -1499,7 +1499,7 @@ iris_compile_tes(struct iris_screen *screen,
struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
enum brw_param_builtin *system_values;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
unsigned num_system_values;
unsigned num_cbufs;
......@@ -1620,7 +1620,7 @@ iris_compile_gs(struct iris_screen *screen,
const struct iris_gs_prog_key *key)
{
const struct brw_compiler *compiler = screen->compiler;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
void *mem_ctx = ralloc_context(NULL);
struct brw_gs_prog_data *gs_prog_data =
rzalloc(mem_ctx, struct brw_gs_prog_data);
......@@ -1747,7 +1747,7 @@ iris_compile_fs(struct iris_screen *screen,
rzalloc(mem_ctx, struct brw_wm_prog_data);
struct brw_stage_prog_data *prog_data = &fs_prog_data->base;
enum brw_param_builtin *system_values;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
unsigned num_system_values;
unsigned num_cbufs;
......@@ -2033,7 +2033,7 @@ iris_compile_cs(struct iris_screen *screen,
rzalloc(mem_ctx, struct brw_cs_prog_data);
struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
enum brw_param_builtin *system_values;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
unsigned num_system_values;
unsigned num_cbufs;
......@@ -2146,7 +2146,7 @@ iris_get_scratch_space(struct iris_context *ice,
{
struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
struct iris_bufmgr *bufmgr = screen->bufmgr;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
unsigned encoded_size = ffs(per_thread_scratch) - 11;
assert(encoded_size < (1 << 16));
......@@ -2228,7 +2228,7 @@ iris_create_uncompiled_shader(struct iris_screen *screen,
nir_shader *nir,
const struct pipe_stream_output_info *so_info)
{
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_uncompiled_shader *ish =
calloc(1, sizeof(struct iris_uncompiled_shader));
......@@ -2433,7 +2433,7 @@ iris_create_fs_state(struct pipe_context *ctx,
bool can_rearrange_varyings =
util_bitcount64(info->inputs_read & BRW_FS_VARYING_INPUT_MASK) <= 16;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_fs_prog_key key = {
KEY_ID(base),
.nr_color_regions = util_bitcount(color_outputs),
......@@ -2682,7 +2682,7 @@ iris_bind_fs_state(struct pipe_context *ctx, void *state)
{
struct iris_context *ice = (struct iris_context *) ctx;
struct iris_screen *screen = (struct iris_screen *) ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
struct iris_uncompiled_shader *old_ish =
ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
struct iris_uncompiled_shader *new_ish = state;
......
......@@ -123,7 +123,7 @@ iris_upload_shader(struct iris_screen *screen,
unsigned num_cbufs,
const struct iris_binding_table *bt)
{
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
void *mem_ctx = ish ? NULL : (void *) driver_shaders;
struct iris_compiled_shader *shader =
......
......@@ -156,7 +156,7 @@ iris_pipelined_write(struct iris_batch *batch,
enum pipe_control_flags flags,
unsigned offset)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
const unsigned optional_cs_stall =
GFX_VER == 9 && devinfo->gt == 4 ? PIPE_CONTROL_CS_STALL : 0;
struct iris_bo *bo = iris_resource_bo(q->query_state_ref.res);
......@@ -286,7 +286,7 @@ stream_overflowed(struct iris_query_so_overflow *so, int s)
}
static void
calculate_result_on_cpu(const struct gen_device_info *devinfo,
calculate_result_on_cpu(const struct intel_device_info *devinfo,
struct iris_query *q)
{
switch (q->type) {
......@@ -297,12 +297,12 @@ calculate_result_on_cpu(const struct gen_device_info *devinfo,
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIMESTAMP_DISJOINT:
/* The timestamp is the single starting snapshot. */
q->result = gen_device_info_timebase_scale(devinfo, q->map->start);
q->result = intel_device_info_timebase_scale(devinfo, q->map->start);
q->result &= (1ull << TIMESTAMP_BITS) - 1;
break;
case PIPE_QUERY_TIME_ELAPSED:
q->result = iris_raw_timestamp_delta(q->map->start, q->map->end);
q->result = gen_device_info_timebase_scale(devinfo, q->result);
q->result = intel_device_info_timebase_scale(devinfo, q->result);
q->result &= (1ull << TIMESTAMP_BITS) - 1;
break;
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
......@@ -385,7 +385,7 @@ query_is_boolean(enum pipe_query_type type)
* Calculate the result using MI_MATH.
*/
static struct mi_value
calculate_result_on_gpu(const struct gen_device_info *devinfo,
calculate_result_on_gpu(const struct intel_device_info *devinfo,
struct mi_builder *b,
struct iris_query *q)
{
......@@ -590,7 +590,7 @@ static void
iris_check_query_no_flush(struct iris_context *ice, struct iris_query *q)
{
struct iris_screen *screen = (void *) ice->ctx.screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (!q->ready && READ_ONCE(q->map->snapshots_landed)) {
calculate_result_on_cpu(devinfo, q);
......@@ -610,7 +610,7 @@ iris_get_query_result(struct pipe_context *ctx,
return iris_get_monitor_result(ctx, q->monitor, wait, result->batch);
struct iris_screen *screen = (void *) ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (unlikely(screen->no_hw)) {
result->u64 = 0;
......@@ -660,7 +660,7 @@ iris_get_query_result_resource(struct pipe_context *ctx,
struct iris_context *ice = (void *) ctx;
struct iris_query *q = (void *) query;
struct iris_batch *batch = &ice->batches[q->batch_idx];
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const struct intel_device_info *devinfo = &batch->screen->devinfo;
struct iris_resource *res = (void *) p_res;
struct iris_bo *query_bo = iris_resource_bo(q->query_state_ref.res);
struct iris_bo *dst_bo = iris_resource_bo(p_res);
......
......@@ -186,7 +186,7 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
{
struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
struct iris_screen *screen = (void *) ice->ctx.screen;
struct gen_device_info *devinfo = &screen->devinfo;
struct intel_device_info *devinfo = &screen->devinfo;
struct iris_uncompiled_shader *ish =
ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
const nir_shader *nir = ish->nir;
......@@ -444,7 +444,7 @@ iris_mcs_partial_resolve(struct iris_context *ice,
}
bool
iris_sample_with_depth_aux(const struct gen_device_info *devinfo,
iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
const struct iris_resource *res)
{
switch (res->aux.usage) {
......@@ -814,7 +814,7 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
enum isl_format view_format)
{
struct iris_screen *screen = (void *) ice->ctx.screen;
struct gen_device_info *devinfo = &screen->devinfo;
struct intel_device_info *devinfo = &screen->devinfo;
switch (res->aux.usage) {
case ISL_AUX_USAGE_HIZ:
......@@ -952,7 +952,7 @@ iris_resource_render_aux_usage(struct iris_context *ice,
bool draw_aux_disabled)
{
struct iris_screen *screen = (void *) ice->ctx.screen;
struct gen_device_info *devinfo = &screen->devinfo;
struct intel_device_info *devinfo = &screen->devinfo;
if (draw_aux_disabled)
return ISL_AUX_USAGE_NONE;
......
......@@ -75,7 +75,7 @@ static const uint64_t priority_to_modifier[] = {
};
static bool
modifier_is_supported(const struct gen_device_info *devinfo,
modifier_is_supported(const struct intel_device_info *devinfo,
enum pipe_format pfmt, uint64_t modifier)
{
/* Check for basic device support. */
......@@ -138,7 +138,7 @@ modifier_is_supported(const struct gen_device_info *devinfo,
}
static uint64_t
select_best_modifier(struct gen_device_info *devinfo, enum pipe_format pfmt,
select_best_modifier(struct intel_device_info *devinfo, enum pipe_format pfmt,
const uint64_t *modifiers,
int count)
{
......@@ -198,7 +198,7 @@ iris_query_dmabuf_modifiers(struct pipe_screen *pscreen,
int *count)
{
struct iris_screen *screen = (void *) pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
uint64_t all_modifiers[] = {
DRM_FORMAT_MOD_LINEAR,
......@@ -238,7 +238,7 @@ iris_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
bool *external_only)
{
struct iris_screen *screen = (void *) pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (modifier_is_supported(devinfo, pfmt, modifier)) {
if (external_only)
......@@ -273,7 +273,7 @@ iris_image_view_get_format(struct iris_context *ice,
const struct pipe_image_view *img)
{
struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
isl_surf_usage_flags_t usage = ISL_SURF_USAGE_STORAGE_BIT;
enum isl_format isl_fmt =
......@@ -398,7 +398,7 @@ iris_get_depth_stencil_resources(struct pipe_resource *res,
}
enum isl_dim_layout
iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
iris_get_isl_dim_layout(const struct intel_device_info *devinfo,
enum isl_tiling tiling,
enum pipe_texture_target target)
{
......@@ -531,7 +531,7 @@ create_aux_state_map(struct iris_resource *res, enum isl_aux_state initial)
static unsigned
iris_get_aux_clear_color_state_size(struct iris_screen *screen)
{
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
return devinfo->ver >= 10 ? screen->isl_dev.ss.clear_color_state_size : 0;
}
......@@ -539,7 +539,7 @@ static void
map_aux_addresses(struct iris_screen *screen, struct iris_resource *res,
enum isl_format format, unsigned plane)
{
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
if (devinfo->ver >= 12 && isl_aux_usage_has_ccs(res->aux.usage)) {
void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
assert(aux_map_ctx);
......@@ -555,7 +555,7 @@ map_aux_addresses(struct iris_screen *screen, struct iris_resource *res,
}
static bool
want_ccs_e_for_format(const struct gen_device_info *devinfo,
want_ccs_e_for_format(const struct intel_device_info *devinfo,
enum isl_format format)
{
if (!isl_format_supports_ccs_e(devinfo, format))
......@@ -671,7 +671,7 @@ static bool
iris_resource_configure_aux(struct iris_screen *screen,
struct iris_resource *res, bool imported)
{
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
/* Try to create the auxiliary surfaces allowed by the modifier or by
* the user if no modifier is specified.
......@@ -978,7 +978,7 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
int modifiers_count)
{
struct iris_screen *screen = (struct iris_screen *)pscreen;
struct gen_device_info *devinfo = &screen->devinfo;
struct intel_device_info *devinfo = &screen->devinfo;
struct iris_resource *res = iris_alloc_resource(pscreen, templ);
if (!res)
......
......@@ -305,7 +305,7 @@ iris_mocs(const struct iris_bo *bo,
return isl_mocs(dev, usage, bo && bo->external);
}
struct iris_format_info iris_format_for_usage(const struct gen_device_info *,
struct iris_format_info iris_format_for_usage(const struct intel_device_info *,
enum pipe_format pf,
isl_surf_usage_flags_t usage);
......@@ -459,7 +459,7 @@ iris_resource_access_raw(struct iris_context *ice,
}
}
enum isl_dim_layout iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
enum isl_dim_layout iris_get_isl_dim_layout(const struct intel_device_info *devinfo,
enum isl_tiling tiling,
enum pipe_texture_target target);
static inline enum isl_surf_dim
......@@ -522,7 +522,7 @@ void iris_resource_check_level_layer(const struct iris_resource *res,
bool iris_resource_level_has_hiz(const struct iris_resource *res,
uint32_t level);
bool iris_sample_with_depth_aux(const struct gen_device_info *devinfo,
bool iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
const struct iris_resource *res);
bool iris_has_color_unresolved(const struct iris_resource *res,
......
......@@ -113,7 +113,7 @@ static void
iris_get_driver_uuid(struct pipe_screen *pscreen, char *uuid)
{
struct iris_screen *screen = (struct iris_screen *)pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
intel_uuid_compute_driver_id((uint8_t *)uuid, devinfo, PIPE_UUID_SIZE);
}
......@@ -158,7 +158,7 @@ static int
iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
struct iris_screen *screen = (struct iris_screen *)pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
switch (param) {
case PIPE_CAP_NPOT_TEXTURES:
......@@ -524,7 +524,7 @@ iris_get_compute_param(struct pipe_screen *pscreen,
void *ret)
{
struct iris_screen *screen = (struct iris_screen *)pscreen;
const struct gen_device_info *devinfo = &screen->devinfo;
const struct intel_device_info *devinfo = &screen->devinfo;
/* Limit max_threads to 64 for the GPGPU_WALKER command. */
const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
......@@ -611,7 +611,7 @@ iris_get_timestamp(struct pipe_screen *pscreen)
iris_reg_read(screen->bufmgr, TIMESTAMP | 1, &result);
result = gen_device_info_timebase_scale(&screen->devinfo, result);
result = intel_device_info_timebase_scale(&screen->devinfo, result);
result &= (1ull << TIMESTAMP_BITS) - 1;
return result;
......@@ -684,7 +684,7 @@ iris_getparam_integer(int fd, int param)
}
static const struct intel_l3_config *
iris_get_default_l3_config(const struct gen_device_info *devinfo,
iris_get_default_l3_config(const struct intel_device_info *devinfo,
bool compute)
{
bool wants_dc_cache = true;
......@@ -848,7 +848,7 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)