Commit 5d7e7545 authored by Anuj Phogat's avatar Anuj Phogat Committed by Marge Bot
Browse files

intel: Rename gen_{pipeline, oa, counter, hw} to intel_{..}



export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965
grep -E "gen_" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_\(pipeline\|oa\|counter\|hw\)/intel_\1/g"
Signed-off-by: Anuj Phogat's avatarAnuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
Part-of: <mesa/mesa!10241>
parent b2ef2948
......@@ -777,10 +777,10 @@ def main():
c_outdent(3)
c("}\n")
h("void gen_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf);\n")
h("void intel_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf);\n")
c("\nvoid")
c("gen_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf)")
c("intel_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf)")
c("{")
c_indent(3)
......
......@@ -435,52 +435,52 @@ static perf_register_oa_queries_t
get_register_queries_function(const struct intel_device_info *devinfo)
{
if (devinfo->is_haswell)
return gen_oa_register_queries_hsw;
return intel_oa_register_queries_hsw;
if (devinfo->is_cherryview)
return gen_oa_register_queries_chv;
return intel_oa_register_queries_chv;
if (devinfo->is_broadwell)
return gen_oa_register_queries_bdw;
return intel_oa_register_queries_bdw;
if (devinfo->is_broxton)
return gen_oa_register_queries_bxt;
return intel_oa_register_queries_bxt;
if (devinfo->is_skylake) {
if (devinfo->gt == 2)
return gen_oa_register_queries_sklgt2;
return intel_oa_register_queries_sklgt2;
if (devinfo->gt == 3)
return gen_oa_register_queries_sklgt3;
return intel_oa_register_queries_sklgt3;
if (devinfo->gt == 4)
return gen_oa_register_queries_sklgt4;
return intel_oa_register_queries_sklgt4;
}
if (devinfo->is_kabylake) {
if (devinfo->gt == 2)
return gen_oa_register_queries_kblgt2;
return intel_oa_register_queries_kblgt2;
if (devinfo->gt == 3)
return gen_oa_register_queries_kblgt3;
return intel_oa_register_queries_kblgt3;
}
if (devinfo->is_geminilake)
return gen_oa_register_queries_glk;
return intel_oa_register_queries_glk;
if (devinfo->is_coffeelake) {
if (devinfo->gt == 2)
return gen_oa_register_queries_cflgt2;
return intel_oa_register_queries_cflgt2;
if (devinfo->gt == 3)
return gen_oa_register_queries_cflgt3;
return intel_oa_register_queries_cflgt3;
}
if (devinfo->ver == 11) {
if (devinfo->is_elkhartlake)
return gen_oa_register_queries_ehl;
return gen_oa_register_queries_icl;
return intel_oa_register_queries_ehl;
return intel_oa_register_queries_icl;
}
if (devinfo->is_tigerlake) {
if (devinfo->gt == 1)
return gen_oa_register_queries_tglgt1;
return intel_oa_register_queries_tglgt1;
if (devinfo->gt == 2)
return gen_oa_register_queries_tglgt2;
return intel_oa_register_queries_tglgt2;
}
if (devinfo->is_rocketlake)
return gen_oa_register_queries_rkl;
return intel_oa_register_queries_rkl;
if (devinfo->is_dg1)
return gen_oa_register_queries_dg1;
return intel_oa_register_queries_dg1;
if (devinfo->is_alderlake)
return gen_oa_register_queries_adl;
return intel_oa_register_queries_adl;
return NULL;
}
......
......@@ -96,7 +96,7 @@ enum intel_perf_counter_units {
INTEL_PERF_COUNTER_UNITS_MAX
};
struct gen_pipeline_stat {
struct intel_pipeline_stat {
uint32_t reg;
uint32_t numerator;
uint32_t denominator;
......@@ -186,7 +186,7 @@ struct intel_perf_query_counter {
float (*oa_counter_read_float)(struct intel_perf_config *perf,
const struct intel_perf_query_info *query,
const struct intel_perf_query_result *results);
struct gen_pipeline_stat pipeline_stat;
struct intel_pipeline_stat pipeline_stat;
};
};
......
gen_hw_metrics = [
intel_hw_metrics = [
'hsw',
'bdw', 'chv',
'sklgt2', 'sklgt3', 'sklgt4',
......@@ -9,9 +9,9 @@ gen_hw_metrics = [
'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl',
]
gen_hw_metrics_xml_files = []
foreach hw : gen_hw_metrics
gen_hw_metrics_xml_files += 'oa-@0@.xml'.format(hw)
intel_hw_metrics_xml_files = []
foreach hw : intel_hw_metrics
intel_hw_metrics_xml_files += 'oa-@0@.xml'.format(hw)
endforeach
intel_perf_sources = [
......@@ -22,7 +22,7 @@ intel_perf_sources = [
intel_perf_sources += custom_target(
'intel-perf-sources',
input : gen_hw_metrics_xml_files,
input : intel_hw_metrics_xml_files,
output : [ 'intel_perf_metrics.c', 'intel_perf_metrics.h' ],
command : [
prog_python, files('gen_perf.py'),
......
......@@ -348,25 +348,25 @@ VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR(
VK_OUTARRAY_MAKE(out_desc, pCounterDescriptions, &desc_count);
for (int c = 0; c < (perf ? perf->n_counters : 0); c++) {
const struct intel_perf_query_counter *gen_counter = perf->counter_infos[c].counter;
const struct intel_perf_query_counter *intel_counter = perf->counter_infos[c].counter;
vk_outarray_append(&out, counter) {
counter->unit = intel_perf_counter_unit_to_vk_unit[gen_counter->units];
counter->unit = intel_perf_counter_unit_to_vk_unit[intel_counter->units];
counter->scope = VK_QUERY_SCOPE_COMMAND_KHR;
counter->storage = intel_perf_counter_data_type_to_vk_storage[gen_counter->data_type];
counter->storage = intel_perf_counter_data_type_to_vk_storage[intel_counter->data_type];
unsigned char sha1_result[20];
_mesa_sha1_compute(gen_counter->symbol_name,
strlen(gen_counter->symbol_name),
_mesa_sha1_compute(intel_counter->symbol_name,
strlen(intel_counter->symbol_name),
sha1_result);
memcpy(counter->uuid, sha1_result, sizeof(counter->uuid));
}
vk_outarray_append(&out_desc, desc) {
desc->flags = 0; /* None so far. */
snprintf(desc->name, sizeof(desc->name), "%s", gen_counter->name);
snprintf(desc->category, sizeof(desc->category), "%s", gen_counter->category);
snprintf(desc->description, sizeof(desc->description), "%s", gen_counter->desc);
snprintf(desc->name, sizeof(desc->name), "%s", intel_counter->name);
snprintf(desc->category, sizeof(desc->category), "%s", intel_counter->category);
snprintf(desc->description, sizeof(desc->description), "%s", intel_counter->desc);
}
}
......
......@@ -172,7 +172,7 @@ intel_counter_type_enum_to_gl_type(enum intel_perf_counter_type type)
}
static GLuint
gen_counter_data_type_to_gl_type(enum intel_perf_counter_data_type type)
intel_counter_data_type_to_gl_type(enum intel_perf_counter_data_type type)
{
switch (type) {
case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32: return GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL;
......@@ -212,7 +212,7 @@ brw_get_perf_counter_info(struct gl_context *ctx,
*offset = counter->offset;
*data_size = intel_perf_query_counter_get_size(counter);
*type_enum = intel_counter_type_enum_to_gl_type(counter->type);
*data_type_enum = gen_counter_data_type_to_gl_type(counter->data_type);
*data_type_enum = intel_counter_data_type_to_gl_type(counter->data_type);
*raw_max = counter->raw_max;
}
......
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