Write a SSA-based register allocaton and register coalesce pass

We need to write a reasonably competent register allocation pass. In order to be considered competent, it needs to have the following capabilities:

• Capable of handling register allocations of different sizes
• Work on the physical (not just logical) CFG while still maintaining the chordal property that is key for SSA-based allocation
• Able to look back into the history and attempt to allocate in such a way that it can also coalesce SIMD zip, vecN, load_payload, and load_header type instructions.