• Samuel Iglesias Gonsálvez's avatar
    i965/vec4: fix vertical stride to avoid breaking region parameter rule · a013db9d
    Samuel Iglesias Gonsálvez authored
    From IVB PRM, vol4, part3, "General Restrictions on Regioning
    Parameters":
    
      "If ExecSize = Width and HorzStride ≠ 0, VertStride must
       be set to Width * HorzStride."
    
    In next patch, we are going to modify the region parameter for
    uniforms and vgrf. For uniforms that are the source of
    DF align1 instructions, they will have <0, 4, 1> regioning and
    the execsize for those instructions will be 4, so they will break
    the regioning rule. This will be the same for VGRF sources where
    we use the vstride == 0 exploit.
    
    As we know we are not going to cross the GRF boundary with that
    execsize and parameters (not even with the exploit), we just fix
    the vstride here.
    
    v2:
    - Move is_align1_df() (Curro)
    - Refactor exec_size == width calculation (Curro)
    Signed-off-by: Samuel Iglesias Gonsálvez's avatarSamuel Iglesias Gonsálvez <siglesias@igalia.com>
    Cc: "17.1" <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Francisco Jerez's avatarFrancisco Jerez <currojerez@riseup.net>
    (cherry picked from commit 7f728bce)
    [Andres Gomez: use original is_align1_df]
    Signed-off-by: Andres Gomez's avatarAndres Gomez <agomez@igalia.com>
    
    Conflicts:
    	src/mesa/drivers/dri/i965/brw_vec4.cpp
    a013db9d
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