...
 
Commits (500)
......@@ -317,6 +317,7 @@ NIR_FILES = \
nir/nir_serialize.c \
nir/nir_serialize.h \
nir/nir_strip.c \
nir/nir_shader_from_string.c \
nir/nir_split_per_member_structs.c \
nir/nir_split_var_copies.c \
nir/nir_split_vars.c \
......
......@@ -198,6 +198,7 @@ files_libnir = files(
'nir_serialize.c',
'nir_serialize.h',
'nir_strip.c',
'nir_shader_from_string.c',
'nir_split_per_member_structs.c',
'nir_split_var_copies.c',
'nir_split_vars.c',
......@@ -265,6 +266,19 @@ if with_tests
suite : ['compiler', 'nir'],
)
test(
'nir_shader_from_string_tests',
executable(
'nir_shader_from_string_test',
files('tests/shader_from_string_tests.cpp'),
cpp_args : [cpp_vis_args, cpp_msvc_compat_args],
include_directories : [inc_common],
dependencies : [dep_thread, idep_gtest, idep_nir],
link_with : libmesa_util,
),
suite : ['compiler', 'nir'],
)
test(
'nir_vars',
executable(
......
......@@ -2268,6 +2268,8 @@ typedef struct nir_shader_compiler_options {
bool lower_ldexp;
bool lower_to_scalar_only_64_bit_ops;
bool lower_pack_half_2x16;
bool lower_pack_unorm_2x16;
bool lower_pack_snorm_2x16;
......@@ -3534,6 +3536,9 @@ uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
nir_shader *
nir_shader_from_string(const char *shader, const nir_shader_compiler_options *options);
#ifdef __cplusplus
} /* extern "C" */
#endif
......
......@@ -89,7 +89,8 @@ lower_alu_instr_scalar(nir_alu_instr *instr, nir_builder *b)
case name##2: \
case name##3: \
case name##4: \
lower_reduction(instr, chan, merge, b); \
if (!b->shader->options->lower_to_scalar_only_64_bit_ops) \
lower_reduction(instr, chan, merge, b); \
return true;
switch (instr->op) {
......@@ -175,6 +176,9 @@ lower_alu_instr_scalar(nir_alu_instr *instr, nir_builder *b)
}
case nir_op_fdph: {
if (b->shader->options->lower_to_scalar_only_64_bit_ops)
return false;
nir_ssa_def *src0_vec = nir_ssa_for_alu_src(b, instr, 0);
nir_ssa_def *src1_vec = nir_ssa_for_alu_src(b, instr, 1);
......@@ -216,6 +220,10 @@ lower_alu_instr_scalar(nir_alu_instr *instr, nir_builder *b)
if (instr->dest.dest.ssa.num_components == 1)
return false;
if (b->shader->options->lower_to_scalar_only_64_bit_ops &&
instr->dest.dest.ssa.bit_size < 64)
return false;
unsigned num_components = instr->dest.dest.ssa.num_components;
nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS] = { NULL };
......
This diff is collapsed.
......@@ -509,6 +509,7 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
case nir_intrinsic_load_deref: {
nir_deref_instr *src = nir_src_as_deref(instr->src[0]);
assert(src);
validate_assert(state, glsl_type_is_vector_or_scalar(src->type) ||
(src->mode == nir_var_uniform &&
glsl_get_base_type(src->type) == GLSL_TYPE_SUBROUTINE));
......@@ -523,6 +524,7 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
case nir_intrinsic_store_deref: {
nir_deref_instr *dst = nir_src_as_deref(instr->src[0]);
assert(dst);
validate_assert(state, glsl_type_is_vector_or_scalar(dst->type));
validate_assert(state, instr->num_components ==
glsl_get_vector_elements(dst->type));
......
This diff is collapsed.
......@@ -508,6 +508,20 @@ glsl_array_type(const glsl_type *base, unsigned elements,
return glsl_type::get_array_instance(base, elements, explicit_stride);
}
const glsl_type *
glsl_replace_vector_type(const glsl_type *t, unsigned components)
{
if (glsl_type_is_array(t)) {
return glsl_array_type(
glsl_replace_vector_type(t->fields.array, components), t->length,
t->explicit_stride);
} else if (glsl_type_is_vector_or_scalar(t)) {
return glsl_vector_type(t->base_type, components);
} else {
unreachable("Unhandled base type glsl_replace_vector_type()");
}
}
const glsl_type *
glsl_struct_type(const glsl_struct_field *fields,
unsigned num_fields, const char *name,
......
......@@ -156,6 +156,8 @@ const struct glsl_type *glsl_bool_type(void);
const struct glsl_type *glsl_scalar_type(enum glsl_base_type base_type);
const struct glsl_type *glsl_vector_type(enum glsl_base_type base_type,
unsigned components);
const struct glsl_type * glsl_replace_vector_type(const struct glsl_type *t,
unsigned components);
const struct glsl_type *glsl_matrix_type(enum glsl_base_type base_type,
unsigned rows, unsigned columns);
const struct glsl_type *glsl_explicit_matrix_type(const struct glsl_type *mat,
......
......@@ -32,6 +32,11 @@
#include "compiler/shader_enums.h"
#ifdef __cplusplus
extern "C" {
#endif
void
tgsi_get_gl_varying_semantic(gl_varying_slot attr,
bool needs_texcoord_semantic,
......@@ -83,4 +88,8 @@ tgsi_processor_to_shader_stage(unsigned processor)
}
}
#ifdef __cplusplus
}
#endif
#endif /* TGSI_FROM_MESA_H */
......@@ -26,6 +26,8 @@ C_SOURCES = \
r600_public.h \
r600_shader.c \
r600_shader.h \
r600_shader_nir.c \
r600_shader_nir.h \
r600_sq.h \
r600_state.c \
r600_state_common.c \
......@@ -85,7 +87,58 @@ CXX_SOURCES = \
sb/sb_shader.cpp \
sb/sb_shader.h \
sb/sb_ssa_builder.cpp \
sb/sb_valtable.cpp
sb/sb_valtable.cpp \
sfn/sfn_alu_defines.cpp \
sfn/sfn_alu_defines.h \
sfn/sfn_alu_node.cpp \
sfn/sfn_alu_node.h \
sfn/sfn_bc_test.cpp \
sfn/sfn_bc_test.h \
sfn/sfn_callstack.cpp \
sfn/sfn_callstack.h \
sfn/sfn_conditionaljumptracker.cpp \
sfn/sfn_conditionaljumptracker.h \
sfn/sfn_callstack.h \
sfn/sfn_cf_node.cpp \
sfn/sfn_cf_node.h \
sfn/sfn_defines.h \
sfn/sfn_disassembler.cpp \
sfn/sfn_disassembler.h \
sfn/sfn_emitaluinstruction.cpp \
sfn/sfn_emitaluinstruction.h \
sfn/sfn_emitinstruction.cpp \
sfn/sfn_emitinstruction.h \
sfn/sfn_emittexinstruction.cpp \
sfn/sfn_emitinstruction.h \
sfn/sfn_fetch_node.cpp \
sfn/sfn_fetch_node.h \
sfn/sfn_fragment_shader_from_nir.cpp \
sfn/sfn_fragment_shader_from_nir.h \
sfn/sfn_gprarray.cpp \
sfn/sfn_gprarray.h \
sfn/sfn_ir_to_assembly.cpp \
sfn/sfn_ir_to_assembly.h \
sfn/sfn_ifelseinstruction.cpp \
sfn/sfn_ifelseinstruction.h \
sfn/sfn_instr.cpp \
sfn/sfn_instr.h \
sfn/sfn_liverange.cpp \
sfn/sfn_liverange.h \
sfn/sfn_node.cpp \
sfn/sfn_node.h \
sfn/sfn_shader_from_nir.cpp \
sfn/sfn_shader_from_nir.h \
sfn/sfn_stderr_streamlog.cpp \
sfn/sfn_stderr_streamlog.h \
sfn/sfn_shaderio.cpp \
sfn/sfn_shaderio.h \
sfn/sfn_value.cpp \
sfn/sfn_value.h \
sfn/sfn_valuepool.cpp \
sfn/sfn_valuepool.h \
sfn/sfn_vertex_shader_from_nir.cpp \
sfn/sfn_vertex_shader_from_nir.h
R600_GENERATED_FILES = \
egd_tables.h
\ No newline at end of file
......@@ -424,9 +424,12 @@ static void *evergreen_create_compute_state(struct pipe_context *ctx,
shader->ir_type = cso->ir_type;
if (shader->ir_type == PIPE_SHADER_IR_TGSI) {
shader->sel = r600_create_shader_state_tokens(ctx, cso->prog, PIPE_SHADER_COMPUTE);
shader->sel = r600_create_shader_state_tokens(ctx, cso->prog, cso->ir_type, PIPE_SHADER_COMPUTE);
return shader;
}
} else if (shader->ir_type == PIPE_SHADER_IR_NIR){
shader->sel = r600_create_shader_state_tokens(ctx, cso->prog, cso->ir_type, PIPE_SHADER_COMPUTE);
return shader;
}
#ifdef HAVE_OPENCL
COMPUTE_DBG(rctx->screen, "*** evergreen_create_compute_state\n");
header = cso->prog;
......
......@@ -3537,7 +3537,6 @@ void evergreen_update_gs_state(struct pipe_context *ctx, struct r600_pipe_shader
/* VGT_GS_MODE is written by evergreen_emit_shader_stages */
r600_store_context_reg(cb, R_028B38_VGT_GS_MAX_VERT_OUT,
S_028B38_MAX_VERT_OUT(shader->selector->gs_max_out_vertices));
r600_store_context_reg(cb, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
......
......@@ -45,6 +45,8 @@ files_r600 = files(
'r600_public.h',
'r600_shader.c',
'r600_shader.h',
'r600_shader_nir.c',
'r600_shader_nir.h',
'r600_sq.h',
'r600_state.c',
'r600_state_common.c',
......@@ -103,6 +105,59 @@ files_r600 = files(
'sb/sb_shader.h',
'sb/sb_ssa_builder.cpp',
'sb/sb_valtable.cpp',
'sfn/sfn_alu_defines.cpp',
'sfn/sfn_alu_defines.h',
'sfn/sfn_alu_node.cpp',
'sfn/sfn_alu_node.h',
'sfn/sfn_bc_test.cpp',
'sfn/sfn_bc_test.h',
'sfn/sfn_callstack.cpp',
'sfn/sfn_callstack.h',
'sfn/sfn_conditionaljumptracker.cpp',
'sfn/sfn_conditionaljumptracker.h',
'sfn/sfn_cf_node.cpp',
'sfn/sfn_cf_node.h',
'sfn/sfn_defines.h',
'sfn/sfn_disassembler.cpp',
'sfn/sfn_disassembler.h',
'sfn/sfn_emitaluinstruction.cpp',
'sfn/sfn_emitaluinstruction.h',
'sfn/sfn_emitinstruction.cpp',
'sfn/sfn_emitinstruction.h',
'sfn/sfn_emittexinstruction.cpp',
'sfn/sfn_emitinstruction.h',
'sfn/sfn_exportinstruction.cpp',
'sfn/sfn_exportinstruction.h',
'sfn/sfn_fetch_node.cpp',
'sfn/sfn_fetch_node.h',
'sfn/sfn_fragment_shader_from_nir.cpp',
'sfn/sfn_fragment_shader_from_nir.h',
'sfn/sfn_geometry_shader_from_nir.cpp',
'sfn/sfn_geometry_shader_from_nir.h',
'sfn/sfn_gprarray.cpp',
'sfn/sfn_gprarray.h',
'sfn/sfn_ifelseinstruction.cpp',
'sfn/sfn_ifelseinstruction.h',
'sfn/sfn_instr.cpp',
'sfn/sfn_instr.h',
'sfn/sfn_ir_to_assembly.cpp',
'sfn/sfn_ir_to_assembly.h',
'sfn/sfn_liverange.cpp',
'sfn/sfn_liverange.h',
'sfn/sfn_node.cpp',
'sfn/sfn_node.h',
'sfn/sfn_shader_from_nir.cpp',
'sfn/sfn_shader_from_nir.h',
'sfn/sfn_stderr_streamlog.cpp',
'sfn/sfn_stderr_streamlog.h',
'sfn/sfn_shaderio.cpp',
'sfn/sfn_shaderio.h',
'sfn/sfn_value.cpp',
'sfn/sfn_value.h',
'sfn/sfn_valuepool.cpp',
'sfn/sfn_valuepool.h',
'sfn/sfn_vertex_shader_from_nir.cpp',
'sfn/sfn_vertex_shader_from_nir.h',
)
egd_tables_h = custom_target(
......@@ -124,13 +179,98 @@ libr600 = static_library(
c_args : [c_vis_args, r600_c_args, '-Wstrict-overflow=0'],
cpp_args : [cpp_vis_args],
include_directories : [
inc_src, inc_include, inc_gallium, inc_gallium_aux, inc_amd_common,
inc_src, inc_common, inc_include, inc_gallium, inc_gallium_aux, inc_amd_common,
inc_gallium_drivers,
],
dependencies: [dep_libdrm_radeon, dep_elf, dep_llvm],
dependencies: [dep_libdrm_radeon, dep_elf, dep_llvm, idep_nir, idep_nir_headers],
)
driver_r600 = declare_dependency(
compile_args : '-DGALLIUM_R600',
link_with : [libr600, libradeonwinsys],
link_with : [libr600, libmesa_gallium, libradeonwinsys],
)
libr600_sfn_test_common = static_library(
'r600_sfn_test_common',
['sfn/sfn_test_common.cpp'],
include_directories : [inc_common, inc_gallium, inc_gallium_aux,
inc_amd_common, inc_gallium_drivers],
dependencies : [idep_gtest, dep_thread, dep_llvm, idep_nir,
idep_nir_headers],
)
r600_test_dep = declare_dependency(
include_directories : [ inc_common, inc_gallium, inc_gallium_aux,
inc_amd_common, inc_gallium_drivers ],
link_with : [ libr600, libradeonwinsys, libmesa_gallium, libmesa_util,
libglsl_util, libdricommon, libgalliumvl, libgallium,
libr600_sfn_test_common
],
dependencies : [idep_gtest, dep_thread, dep_llvm, idep_nir,
idep_nir_headers]
)
test(
'r600_shader_from_nir_test',
executable(
'test-r600ir_from_nir',
['sfn/test_r600ir_from_nir.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_shader_from_nir_test_2',
executable(
'test-r600ir_from_nir-2',
['sfn/test_r600ir_from_nir_2.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_disassambler_test',
executable(
'test-r600-disassambler',
['sfn/test_program_disass.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_cf_parsing',
executable(
'test-cf-parsing',
['sfn/test_cf_parsing.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_alu_bc',
executable(
'test-r600-alu-bc',
['sfn/test_alu_bc.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_fetch_node',
executable(
'test-r600-fetch_node',
['sfn/test_fetch_node.cpp'],
dependencies : r600_test_dep
)
)
test(
'r600_bc_create',
executable(
'test-r600-bc_create',
['sfn/test_bc_create.cpp'],
dependencies : r600_test_dep
)
)
......@@ -1450,7 +1450,9 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t
bc->cf_last->op == CF_OP_TEX) {
struct r600_bytecode_tex *ttex;
LIST_FOR_EACH_ENTRY(ttex, &bc->cf_last->tex, list) {
if (ttex->dst_gpr == ntex->src_gpr) {
if (ttex->dst_gpr == ntex->src_gpr &&
(ttex->dst_sel_x < 4 || ttex->dst_sel_y < 4 ||
ttex->dst_sel_z < 4 || ttex->dst_sel_z < 4)) {
bc->force_add_cf = 1;
break;
}
......
......@@ -27,6 +27,10 @@
#include "r600_isa.h"
#include "tgsi/tgsi_exec.h"
#ifdef __cplusplus
extern "C" {
#endif
struct r600_bytecode_alu_src {
unsigned sel;
unsigned chan;
......@@ -358,4 +362,9 @@ static inline int fp64_switch(int i)
}
return 0;
}
#ifdef __cplusplus
}
#endif
#endif
......@@ -397,6 +397,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 1 << 27;
case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
return 8;
case PIPE_CAP_PACKED_UNIFORMS:
return 0;
/* Unsupported features. */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
......@@ -443,8 +445,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
case PIPE_CAP_CONSTBUF0_FLAGS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
......@@ -460,7 +461,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
rscreen->b.family == CHIP_CYPRESS ||
rscreen->b.family == CHIP_HEMLOCK)
return 1;
return 0;
return 2;
case PIPE_CAP_CULL_DISTANCE:
return 1;
......@@ -537,7 +538,11 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 7;
case PIPE_CAP_MAX_VARYINGS:
return 32;
/* In NIR the varyings start at 9 because of texture semantics */
if (rscreen->b.debug_flags & DBG_NIR)
return 23;
else
return 32;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
......@@ -653,14 +658,21 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_TGSI;
if (rscreen->b.debug_flags & DBG_NIR &&
(rscreen->b.family >= CHIP_CEDAR) &&
(rscreen->b.family < CHIP_CAYMAN))
return PIPE_SHADER_IR_NIR;
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS: {
int ir = 0;
if (shader == PIPE_SHADER_COMPUTE)
ir = 1 << PIPE_SHADER_IR_NATIVE;
if (rscreen->b.family >= CHIP_CEDAR)
ir |= 1 << PIPE_SHADER_IR_TGSI;
return ir;
if (rscreen->b.family >= CHIP_CEDAR) {
ir |= 1 << PIPE_SHADER_IR_TGSI;
if (rscreen->b.family < CHIP_CAYMAN)
ir |= 1 << PIPE_SHADER_IR_NIR;
}
return ir;
}
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
if (rscreen->b.family == CHIP_ARUBA ||
......
......@@ -342,13 +342,16 @@ struct r600_pipe_shader;
struct r600_pipe_shader_selector {
struct r600_pipe_shader *current;
struct tgsi_token *tokens;
struct nir_shader *nir;
struct pipe_stream_output_info so;
struct tgsi_shader_info info;
unsigned num_shaders;
enum pipe_shader_type type;
enum pipe_shader_ir ir_type;
/* geometry shader properties */
enum pipe_prim_type gs_output_prim;
......@@ -1055,8 +1058,9 @@ void eg_dump_debug_state(struct pipe_context *ctx, FILE *f,
unsigned flags);
struct r600_pipe_shader_selector *r600_create_shader_state_tokens(struct pipe_context *ctx,
const struct tgsi_token *tokens,
unsigned pipe_shader_type);
const void *tokens,
enum pipe_shader_ir,
unsigned pipe_shader_type);
int r600_shader_select(struct pipe_context *ctx,
struct r600_pipe_shader_selector* sel,
bool *dirty);
......
......@@ -27,6 +27,7 @@
#include "r600_pipe_common.h"
#include "r600_cs.h"
#include "tgsi/tgsi_parse.h"
#include "compiler/nir/nir.h"
#include "util/list.h"
#include "util/u_draw_quad.h"
#include "util/u_memory.h"
......@@ -891,7 +892,7 @@ static float r600_get_paramf(struct pipe_screen* pscreen,
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
if (rscreen->family >= CHIP_CEDAR)
return 16384.0f;
return 8191.0f;
else
return 8192.0f;
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
......@@ -1257,6 +1258,42 @@ struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen,
}
}
const struct nir_shader_compiler_options r600_nir_options = {
.fuse_ffma = true,
.lower_scmp = true,
.lower_flrp32 = true,
.lower_flrp64 = true,
.lower_fpow = true,
//.lower_fsat = true,
.lower_fdiv = true,
.lower_idiv = true,
//.lower_sub = true,
//.lower_ffma = true,
.lower_to_scalar_only_64_bit_ops = true,
//.lower_pack_snorm_2x16 = true,
//.lower_pack_snorm_4x8 = true,
//.lower_pack_unorm_2x16 = true,
//.lower_pack_unorm_4x8 = true,
//.lower_unpack_snorm_2x16 = true,
//.lower_unpack_snorm_4x8 = true,
//.lower_unpack_unorm_2x16 = true,
//.lower_unpack_unorm_4x8 = true,
.lower_extract_byte = true,
.lower_extract_word = true,
.max_unroll_iterations = 32,
.native_integers = true,
.lower_all_io_to_temps = true,
};
static const void *
r600_get_compiler_options(struct pipe_screen *screen,
enum pipe_shader_ir ir,
enum pipe_shader_type shader)
{
assert(ir == PIPE_SHADER_IR_NIR);
return &r600_nir_options;
}
bool r600_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
......@@ -1290,6 +1327,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
rscreen->b.get_compute_param = r600_get_compute_param;
rscreen->b.get_paramf = r600_get_paramf;
rscreen->b.get_timestamp = r600_get_timestamp;
rscreen->b.get_compiler_options = r600_get_compiler_options;
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
......
This diff is collapsed.
......@@ -45,7 +45,7 @@ struct r600_shader_io {
unsigned name;
unsigned gpr;
unsigned done;
int sid;
unsigned sid;
int spi_sid;
unsigned interpolate;
unsigned ij_index;
......@@ -71,8 +71,8 @@ struct r600_shader {
unsigned nhwatomic;
unsigned nlds;
unsigned nsys_inputs;
struct r600_shader_io input[64];
struct r600_shader_io output[64];
struct r600_shader_io input[80];
struct r600_shader_io output[80];
struct r600_shader_atomic atomics[8];
unsigned nhwatomic_ranges;
boolean uses_kill;
......@@ -190,6 +190,10 @@ int eg_get_interpolator_index(unsigned interpolate, unsigned location);
int r600_get_lds_unique_index(unsigned semantic_name, unsigned index);
int generate_gs_copy_shader(struct r600_context *rctx,
struct r600_pipe_shader *gs,
struct pipe_stream_output_info *so);
#ifdef __cplusplus
} // extern "C"
#endif
......
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/*
* Copyright 2018 Collabora LTD
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef R600_SHADER_NIR
#define R600_SHADER_NIR
struct nir_shader;
struct tgsi_shader_info;
struct tgsi_tessctrl_info;
struct r600_context;
struct r600_pipe_shader;
union r600_shader_key;
#ifdef __cplusplus
extern "C" {
#endif
void r600_nir_scan_shader(const struct nir_shader *nir,
struct tgsi_shader_info *info);
void r600_nir_scan_tess_ctrl(const struct nir_shader *nir,
const struct tgsi_shader_info *info,
struct tgsi_tessctrl_info *out);
int r600_shader_from_nir(struct r600_context *rctx,
struct r600_pipe_shader *pipeshader,
union r600_shader_key *key);
#ifdef __cplusplus
}
#endif
#endif
\ No newline at end of file
......@@ -26,6 +26,7 @@
*/
#include "r600_formats.h"
#include "r600_shader.h"
#include "r600_shader_nir.h"
#include "r600d.h"
#include "util/u_format_s3tc.h"
......@@ -37,6 +38,9 @@
#include "tgsi/tgsi_scan.h"
#include "tgsi/tgsi_ureg.h"
#include "compiler/nir/nir.h"
#include "tgsi/tgsi_from_mesa.h"
void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw)
{
assert(!cb->buf);
......@@ -905,14 +909,20 @@ int r600_shader_select(struct pipe_context *ctx,
}
struct r600_pipe_shader_selector *r600_create_shader_state_tokens(struct pipe_context *ctx,
const struct tgsi_token *tokens,
const void *prog, enum pipe_shader_ir ir,
unsigned pipe_shader_type)
{
struct r600_pipe_shader_selector *sel = CALLOC_STRUCT(r600_pipe_shader_selector);
sel->type = pipe_shader_type;
sel->tokens = tgsi_dup_tokens(tokens);
tgsi_scan_shader(tokens, &sel->info);
if (ir == PIPE_SHADER_IR_TGSI) {
sel->tokens = tgsi_dup_tokens((const struct tgsi_token *)prog);
tgsi_scan_shader(sel->tokens, &sel->info);
} else {
assert(ir == PIPE_SHADER_IR_NIR);
sel->nir = nir_shader_clone(NULL, (const nir_shader *)prog);
r600_nir_scan_shader(sel->nir, &sel->info);
}
return sel;
}
......@@ -921,8 +931,16 @@ static void *r600_create_shader_state(struct pipe_context *ctx,
unsigned pipe_shader_type)
{
int i;
struct r600_pipe_shader_selector *sel = r600_create_shader_state_tokens(ctx, state->tokens, pipe_shader_type);
struct r600_pipe_shader_selector *sel;
if (state->type == PIPE_SHADER_IR_TGSI) {
sel = r600_create_shader_state_tokens(ctx, state->tokens, state->type, pipe_shader_type);
} else {
assert(state->type == PIPE_SHADER_IR_NIR);
sel = r600_create_shader_state_tokens(ctx, state->ir.nir, state->type, pipe_shader_type);
}
sel->ir_type = state->type;
sel->so = state->stream_output;
switch (pipe_shader_type) {
......@@ -1081,7 +1099,13 @@ void r600_delete_shader_selector(struct pipe_context *ctx,
p = c;
}
free(sel->tokens);
if (sel->ir_type == PIPE_SHADER_IR_TGSI) {
free(sel->tokens);
if (sel->nir)
ralloc_free(sel->nir);
}
else if (sel->ir_type == PIPE_SHADER_IR_NIR)
ralloc_free(sel->nir);
free(sel);
}
......
# R600 shader from NIR
This code is an attempt to implement a NIR backend for r600. To get features
in I try to get the examples in https://github.com/opengl-tutorials/ogl
working.
## State
piglits glsl-1.10 - 1.40 passing like with TGSI (except for large arrays)
glsl 1.50 nearly done
- needs better register merge
## to submit upstream
The functionality should be mostly at the level of the TGSI backend
At this point missing:
- compute shaders
- TESS shaders
- some spilling of large arrays (There is an MR for doing this on NIR level)
# Next steps
- fix GS end-primitive shaders, they all fail, either because something is
wrong with the loops or if/then handling, or because the cut-vertex thing is
not correct
- deal with different interpolators at same VARYING slot
(maybe this is an error in the io vectorization)
- change register renumbering to be able to also move register channels
- enable array merging
## Problems
- figure out what is wrong with passes trying to use more varying slots than
available
## Unknows
- multi-function shaders, how to deal with them? fp64 seems to have lots
of them, one option is to inline them
- can type information from variables be harvested?
## Possible optimizations
- add information about uniforms that are already in registers
- peepholes:
- compare + set predicate
- copy propagation:
- Moves from inputs are usually not required, they could be forwarded
- texture operations often move additional parameters in extra registers
but they are actually needed in the same registes they come from and
could just be swizzled into the right place
lowering passes in NIR:
- TESS IO address evaluation should be lowered
## new NIR opcodes that would be nice
discard_if_any_flt
any_fequal_b2f
all_fequal_b2f
alu_op_cube
gtsel/gesel (e.r fused ge/gt+bcsel)
## Done
- VS: reading and writing of position attribute (Needs fix for passing varyings as vectors)
- VS: send a generic value to the FS
- FS: simple color write, interpolated color read from VS
- Basic uniform loading and matrix multiplication
- basic, linear register renumbering to not let gaps from the nir ssa
representation fill up the space
- lazy loading for uniforms
- Add tests for the cube drawing example
- big clean-up of old code
- basic texturing
- implement splitting constant loading
- simple cube map
- flat shading
## Work plan
The idea is to create two conversions: a NIR to a new R600 IR that
can be used to run some finalizing optimizations (replacing the
need for r600/sb) and the binary code generation.
The implementation uses C++ to separate the code for the different
shader types and the byte code generation backends. The initial attempt
will use the already available r600_asm code, and it will be possible
to pass this code to r600/sb.
Apart from that the development follows a comparetive TDD approach, following
the following steps:
- run a tutorial program with TGSI and get dumps of the binary code and
the shader state (done by R600_DUMP_SHADERS). Code was added to
create some source file witha function that fills the needed shader info
- run the same program with DEBUG_R600=nir and when a nir shader fails to
be transformed to the R600ir representation thenit is dumped as a
serialized blob
- create a test case that reads the blob and creates reference the shader
state
- implement the NIR to R600ir conversion until all NIR in the shader can be
converted
- update the test to add the expected R600ir loosely based on the bytecode
assembly and fix register indices etc in the shader state files.
- add the missing parts to the R600ir->assembler conversion. Unfortunately,
this part is not (yet) under test.
- when all the shaders of the program pass these tests, run the program to
see if it works
- refactor and clean the code
- rinse and repeat for the next tutorial
It is inherit to this development style that the design might change a lot.
# BUGS
- currently the automake based build has a problem with library ordering for
libgallium_drv_video and others, a symbol is not found.
Workaround: disable xmvc, vdpau, va
-
## Files
### Implementation, the useful code
sfn_instr.* defines an r600 IR instruction
sfn_ir_to_assembly.cpp
sfn_ir_to_assembly.h
sfn_shader_from_nir.cpp
sfn_shader_from_nir.h
sfn_fragment_shader_from_nir.cpp
sfn_fragment_shader_from_nir.h
sfn_vertex_shader_from_nir.cpp
sfn_vertex_shader_from_nir.h
sfn_value.cpp
sfn_value.h
sfn_test_common.cpp
sfn_test_common.h
test_r600ir_from_nir*.cpp - test NIR to r600 IR conversion
testdata/* - nir blobs and shader states used for testing
### Mostly old code that is here because it might become useful
Some defines and type defs are used though
sfn_alu_defines.cpp
sfn_alu_defines.h
sfn_alu_node.cpp
sfn_alu_node.h
sfn_bc_test.cpp
sfn_bc_test.h
sfn_bytecode.cpp
sfn_bytecode.h
sfn_cf_node.cpp
sfn_cf_node.h
sfn_defines.h
sfn_disassembler.cpp
sfn_disassembler.h
sfn_fetch_node.cpp
sfn_fetch_node.h
sfn_node.cpp
sfn_node.h
test_alu_bc.cpp
test_alu_group.cpp
test_alu_node_bc.cpp
test_bc_create.cpp
test_cf_parsing.cpp
test_fetch_node.cpp
test_program_disass.cpp
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/* -*- mesa-c++ -*-
*
* Copyright (c) 2018 Collabora LTD
*
* Author: Gert Wollny <gert.wollny@collabora.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef r600_sfn_bc_test_h
#define r600_sfn_bc_test_h
#include "sfn_bc_test.h"
#include <gtest/gtest.h>
#include <cstdint>
#include <vector>
#include <sstream>
namespace r600 {
/* Below tests strife to check whether the bits are properly arranged in the
* byte code. Doing this is a pre-requisit for testing the disassembler part
* properly.
*/
::testing::AssertionResult SameBitmap(const std::vector<uint8_t>& spacing,
const char* m_expr,
const char* n_expr,
uint64_t m,
uint64_t n,
const char* filename,
int linenr) {
if (m == n)
return ::testing::AssertionSuccess();
std::ostringstream msg;
msg << filename << ":" << linenr
<< "\n Expected:" << m_expr << " == " << n_expr << "\n got\n"
<< " -" << std::setbase(16) << std::setw(16) << std::setfill('0') << m << "\n"
<< " +" << std::setw(16) << n << "\n"
<< " delta: w1: ";
uint64_t delta = m ^ n;
int tabs = 0;
for (int i = 63; i >= 0; --i) {
msg << ((delta & (1ul << i)) ? '1' : '0');
if (i == spacing[tabs]) {
msg << " ";
++tabs;
}
if (i == 32)
msg << "\n w0: ";
}
return ::testing::AssertionFailure() << msg.str();
}
}
#endif // BC_TEST_H
/* -*- mesa-c++ -*-
*
* Copyright (c) 2018 Collabora LTD
*
* Author: Gert Wollny <gert.wollny@collabora.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef r600_sfn_bc_test_h
#define r600_sfn_bc_test_h
#include <gtest/gtest.h>
#include <cstdint>
#include <vector>
#include <sstream>
namespace r600 {
/* Below tests strife to check whether the bits are properly arranged in the
* byte code. Doing this is a pre-requisit for testing the disassembler part
* properly.
*/
::testing::AssertionResult SameBitmap(const std::vector<uint8_t>& spacing,
const char* m_expr,
const char* n_expr,
uint64_t m,
uint64_t n,
const char* filename,
int linenr);
class BytecodeTest: public testing::Test {
protected:
void check(const char *s_data, const char *s_expect,
uint64_t data, uint64_t expect,
const char* filename, int linenr) const {
GTEST_ASSERT_(SameBitmap(spacing, s_data, s_expect, data, expect,
filename, linenr),
GTEST_NONFATAL_FAILURE_);
}
void set_spacing(const std::vector<uint8_t>& s) {
spacing = s;
}
private:
std::vector<uint8_t> spacing;
};
#define TEST_EQ(X, Y) check(#X, #Y, X, Y, __FILE__, __LINE__)
}
#endif // BC_TEST_H
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#ifndef SFN_CALLSTACK_HH
#define SFN_CALLSTACK_HH
#include "gallium/drivers/r600/r600_asm.h"
namespace r600 {
class CallStack {
public:
CallStack(r600_bytecode& bc);
~CallStack();
int push(unsigned type);
void pop(unsigned type);
int update_max_depth(unsigned type);
private:
r600_bytecode& m_bc;
};
}
#endif // SFN_CALLSTACK_HH
\ No newline at end of file
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0x2f800710010fa47cul
0x4fa00110018fa87cul
0x6fa40290818f907cul
\ No newline at end of file
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