1. 05 Aug, 2019 1 commit
  2. 04 Aug, 2019 12 commits
  3. 03 Aug, 2019 12 commits
  4. 02 Aug, 2019 15 commits
    • Alyssa Rosenzweig's avatar
      pan/midgard: Print texture outmod · 8ddb3820
      Alyssa Rosenzweig authored
      I have no idea who thought this was a good idea.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      8ddb3820
    • Alyssa Rosenzweig's avatar
      pan/midgard: Promote all 16 uniforms · ad864a0b
      Alyssa Rosenzweig authored
      Now that register spilling is in place, this is reasonable. It turns out
      for some shaders, it's actually better to cap at 8 work registers and
      extra >8 uniform reigsters and tolerate the spilling, since the extra
      resulting threads make up for the spillage. So incidentally, the shader
      that spills here is in -bterrain, which jumps from 19fps to 21fps as a
      result of this change.
      
      total instructions in shared programs: 3513 -> 3448 (-1.85%)
      instructions in affected programs: 776 -> 711 (-8.38%)
      helped: 20
      HURT: 0
      helped stats (abs) min: 1 max: 8 x̄: 3.25 x̃: 2
      helped stats (rel) min: 3.57% max: 16.00% x̄: 8.37% x̃: 7.19%
      95% mean confidence interval for instructions value: -4.28 -2.22
      95% mean confidence interval for instructions %-change: -10.02% -6.73%
      Instructions are helped.
      
      total bundles in shared programs: 2067 -> 2024 (-2.08%)
      bundles in affected programs: 515 -> 472 (-8.35%)
      helped: 19
      HURT: 1
      helped stats (abs) min: 1 max: 6 x̄: 2.37 x̃: 2
      helped stats (rel) min: 2.13% max: 17.86% x̄: 10.19% x̃: 11.11%
      HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
      HURT stats (rel)   min: 3.23% max: 3.23% x̄: 3.23% x̃: 3.23%
      95% mean confidence interval for bundles value: -3.01 -1.29
      95% mean confidence interval for bundles %-change: -12.13% -6.91%
      Bundles are helped.
      
      total quadwords in shared programs: 3468 -> 3426 (-1.21%)
      quadwords in affected programs: 764 -> 722 (-5.50%)
      helped: 19
      HURT: 1
      helped stats (abs) min: 1 max: 5 x̄: 2.26 x̃: 2
      helped stats (rel) min: 1.41% max: 12.50% x̄: 6.76% x̃: 7.14%
      HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
      HURT stats (rel)   min: 1.08% max: 1.08% x̄: 1.08% x̃: 1.08%
      95% mean confidence interval for quadwords value: -2.83 -1.37
      95% mean confidence interval for quadwords %-change: -8.08% -4.65%
      Quadwords are helped.
      
      total registers in shared programs: 383 -> 360 (-6.01%)
      registers in affected programs: 112 -> 89 (-20.54%)
      helped: 19
      HURT: 0
      helped stats (abs) min: 1 max: 3 x̄: 1.21 x̃: 1
      helped stats (rel) min: 12.50% max: 27.27% x̄: 20.63% x̃: 20.00%
      95% mean confidence interval for registers value: -1.47 -0.95
      95% mean confidence interval for registers %-change: -22.39% -18.87%
      Registers are helped.
      
      total threads in shared programs: 432 -> 451 (4.40%)
      threads in affected programs: 19 -> 38 (100.00%)
      helped: 11
      HURT: 0
      helped stats (abs) min: 1 max: 2 x̄: 1.73 x̃: 2
      helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
      95% mean confidence interval for threads value: 1.41 2.04
      95% mean confidence interval for threads %-change: 100.00% 100.00%
      Threads are [helped].
      
      total loops in shared programs: 4 -> 4 (0.00%)
      loops in affected programs: 0 -> 0
      helped: 0
      HURT: 0
      
      total spills in shared programs: 0 -> 4
      spills in affected programs: 0 -> 4
      helped: 0
      HURT: 2
      
      total fills in shared programs: 0 -> 7
      fills in affected programs: 0 -> 7
      helped: 0
      HURT: 2
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      ad864a0b
    • Alyssa Rosenzweig's avatar
      pan/midgard: Break mir_spill_register into its function · e94239b9
      Alyssa Rosenzweig authored
      No functional changes, just breaks out a megamonster function and fixes
      the indentation.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      e94239b9
    • Alyssa Rosenzweig's avatar
      pan/midgard: Switch sources to an array for trinary sources · d4bcca19
      Alyssa Rosenzweig authored
      We need three independent sources to support indirect SSBO writes (as
      well as textures with both LOD/bias and offsets). Now is a good time to
      make sources just an array so we don't have to rewrite a ton of code if
      we ever needed a fourth source for some reason.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      d4bcca19
    • Alyssa Rosenzweig's avatar
      pan/midgard: Remove "r27-only" register class · 513d02cf
      Alyssa Rosenzweig authored
      As far as I know, there's no such thing as a load/store op that only
      takes its argument in r27. We just need to set the appropriate arg_1
      field in the RA to specify other registers if we want them.
      
      To facilitate this, various RA-related changes are needed across the
      compiler ; this should also fix indirect offsets which were implicitly
      interpreted as "r27-only" despite not even passing through RA yet. One
      ripple effect change is switching the move insertion point and adjusting
      the liveness analysis accordingly, so while this was intended as a
      purely functional change, there are some shader-db changes:
      
      total instructions in shared programs: 3511 -> 3498 (-0.37%)
      instructions in affected programs: 563 -> 550 (-2.31%)
      helped: 12
      HURT: 0
      helped stats (abs) min: 1 max: 2 x̄: 1.08 x̃: 1
      helped stats (rel) min: 0.93% max: 5.00% x̄: 2.58% x̃: 2.33%
      95% mean confidence interval for instructions value: -1.27 -0.90
      95% mean confidence interval for instructions %-change: -3.23% -1.93%
      Instructions are helped.
      
      total bundles in shared programs: 2067 -> 2067 (0.00%)
      bundles in affected programs: 398 -> 398 (0.00%)
      helped: 7
      HURT: 4
      helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
      helped stats (rel) min: 1.54% max: 10.00% x̄: 5.04% x̃: 5.56%
      HURT stats (abs)   min: 1 max: 2 x̄: 1.75 x̃: 2
      HURT stats (rel)   min: 2.13% max: 4.26% x̄: 3.72% x̃: 4.26%
      95% mean confidence interval for bundles value: -0.95 0.95
      95% mean confidence interval for bundles %-change: -5.21% 1.50%
      Inconclusive result (value mean confidence interval includes 0).
      
      total quadwords in shared programs: 3464 -> 3454 (-0.29%)
      quadwords in affected programs: 1199 -> 1189 (-0.83%)
      helped: 18
      HURT: 4
      helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
      helped stats (rel) min: 1.03% max: 5.26% x̄: 2.44% x̃: 1.79%
      HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
      HURT stats (rel)   min: 2.56% max: 2.82% x̄: 2.63% x̃: 2.56%
      95% mean confidence interval for quadwords value: -0.98 0.07
      Inconclusive result (value mean confidence interval includes 0).
      
      total registers in shared programs: 383 -> 373 (-2.61%)
      registers in affected programs: 56 -> 46 (-17.86%)
      helped: 12
      HURT: 2
      helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
      helped stats (rel) min: 9.09% max: 33.33% x̄: 29.58% x̃: 33.33%
      HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
      HURT stats (rel)   min: 20.00% max: 50.00% x̄: 35.00% x̃: 35.00%
      95% mean confidence interval for registers value: -1.13 -0.29
      95% mean confidence interval for registers %-change: -35.07% -5.63%
      Registers are helped.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      513d02cf
    • Alyssa Rosenzweig's avatar
      pan/midgard: Handle get/set_swizzle for load/store arguments · 5d9b7a8d
      Alyssa Rosenzweig authored
      Load/store's  main "argument 0" already has its swizzle handled
      correctly (for stores, that is). But the tinier arguments, the compact
      ones with a component select but not a full swizzle, those are not yet
      handled. Let's do something about that!
      5d9b7a8d
    • Alyssa Rosenzweig's avatar
      pan/midgard: Fix block successors · 9aeb7260
      Alyssa Rosenzweig authored
      Rather than an ersatz thing that sort of looks like successors but is in
      fact just the source order traversal with some backward jumps hacked in
      for loops... construct an actual flow graph so we can do analysis
      sanely.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      9aeb7260
    • Alyssa Rosenzweig's avatar
    • Alyssa Rosenzweig's avatar
      e112d9d3
    • Alyssa Rosenzweig's avatar
      pan/midgard: Fix REGISTER_OFFSET · 5a572f4b
      Alyssa Rosenzweig authored
      r27 isn't the special one, usually.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      5a572f4b
    • Alyssa Rosenzweig's avatar
      pan/midgard: Split ld/st unknown to arg_1/arg_2 fields · c908772e
      Alyssa Rosenzweig authored
      The 16-bit field can be decomposed to two independent 8-bit fields, each
      representing a single (additional) argument to the load/store op,
      generally used for encoding registers. Addressable registers here are
      substantially limited compared to the main register in a load/store op.
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
      c908772e
    • Bas Nieuwenhuizen's avatar
    • Bas Nieuwenhuizen's avatar
    • Bas Nieuwenhuizen's avatar
      radv: Store image view also outside framebuffer. · a7041f3b
      Bas Nieuwenhuizen authored
      So we can use it with imageless framebuffers.
      Reviewed-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      a7041f3b
    • Bas Nieuwenhuizen's avatar
      radv: Store color/depth surface info in attachment info instead of framebuffer. · 49e6c2fb
      Bas Nieuwenhuizen authored
      That way we can use it for imageless framebuffers.
      Reviewed-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      49e6c2fb