Commit e8f95b5c authored by Anuj Phogat's avatar Anuj Phogat Committed by Emil Velikov

intel/compiler: Memory fence commit must always be enabled for gen10+

Commit bit in the message descriptor (Bit 13) must be always set
to true in CNL+ for memory fence messages. It also fixes a piglit
GPU hang on cnl+ in simulation environment.
Piglit test: arb_shader_image_load_store-shader-mem-barrier
See HSD ES # 1404612949
Signed-off-by: Anuj Phogat's avatarAnuj Phogat <>
Reviewed-by: Francisco Jerez's avatarFrancisco Jerez <>
(cherry picked from commit 56dc9f9f)
parent cdf1f442
......@@ -3275,7 +3275,9 @@ brw_memory_fence(struct brw_codegen *p,
struct brw_reg dst)
const struct gen_device_info *devinfo = p->devinfo;
const bool commit_enable = devinfo->gen == 7 && !devinfo->is_haswell;
const bool commit_enable =
devinfo->gen >= 10 || /* HSD ES # 1404612949 */
(devinfo->gen == 7 && !devinfo->is_haswell);
struct brw_inst *insn;
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