Commit c57a3f20 authored by José Casanova Crespo's avatar José Casanova Crespo

i965/fs: Add byte scattered read message and fs support

v2: Fix alignment style (Topi Pohjolainen)
    (Jason Ekstrand)
    - Enable bit_size parameter to scattered messages to enable different
      bitsizes byte/word/dword.
    - Remove use of brw_send_indirect_scattered_message in favor of
      brw_send_indirect_surface_message.
    - Move scattered messages to surface messages namespace.
    - Assert align1 for scattered messages and assume Gen8+.
    - Inline brw_set_dp_byte_scattered_read.

v3: (Jason Ekstrand)
    - Use renamed brw_byte_scattered_data_element_from_bit_size method
    - Assert scattered read for Gen8+ and Haswell.
    - Use conditional expresion at components_read.
    - Include comment about params for scattered opcodes.
Reviewed-by: Jason Ekstrand's avatarJason Ekstrand <jason@jlekstrand.net>
parent a4031bdf
......@@ -485,6 +485,14 @@ brw_typed_surface_write(struct brw_codegen *p,
unsigned msg_length,
unsigned num_channels);
void
brw_byte_scattered_read(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg payload,
struct brw_reg surface,
unsigned msg_length,
unsigned bit_size);
void
brw_byte_scattered_write(struct brw_codegen *p,
struct brw_reg payload,
......
......@@ -409,6 +409,8 @@ enum opcode {
* opcode, but instead of taking a single payload blog they expect their
* arguments separately as individual sources, like untyped write/read.
*/
SHADER_OPCODE_BYTE_SCATTERED_READ,
SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL,
SHADER_OPCODE_BYTE_SCATTERED_WRITE,
SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL,
......
......@@ -2998,6 +2998,38 @@ brw_byte_scattered_data_element_from_bit_size(unsigned bit_size)
}
}
void
brw_byte_scattered_read(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg payload,
struct brw_reg surface,
unsigned msg_length,
unsigned bit_size)
{
const struct gen_device_info *devinfo = p->devinfo;
assert(devinfo->gen > 7 || devinfo->is_haswell);
assert(brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1);
const unsigned sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
struct brw_inst *insn = brw_send_indirect_surface_message(
p, sfid, dst, payload, surface, msg_length,
brw_surface_payload_size(p, 1, true, true),
false);
unsigned msg_control =
brw_byte_scattered_data_element_from_bit_size(bit_size) << 2;
if (brw_inst_exec_size(devinfo, p->current) == BRW_EXECUTE_16)
msg_control |= 1; /* SIMD16 mode */
else
msg_control |= 0; /* SIMD8 mode */
brw_inst_set_dp_msg_type(devinfo, insn,
HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_READ);
brw_inst_set_dp_msg_control(devinfo, insn, msg_control);
}
void
brw_byte_scattered_write(struct brw_codegen *p,
struct brw_reg payload,
......
......@@ -251,6 +251,7 @@ fs_inst::is_send_from_grf() const
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_READ:
case SHADER_OPCODE_TYPED_ATOMIC:
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
......@@ -750,6 +751,18 @@ fs_inst::components_read(unsigned i) const
else
return 1;
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
/* Scattered logical opcodes use the following params:
* src[0] Surface coordinates
* src[1] Surface operation source (ignored for reads)
* src[2] Surface
* src[3] IMM with always 1 dimension.
* src[4] IMM with arg bitsize for scattered read/write 8, 16, 32
*/
assert(src[3].file == IMM &&
src[4].file == IMM);
return i == 1 ? 0 : 1;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
assert(src[3].file == IMM &&
src[4].file == IMM);
......@@ -798,6 +811,7 @@ fs_inst::size_read(int arg) const
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_READ:
if (arg == 0)
return mlen * REG_SIZE;
break;
......@@ -4545,6 +4559,12 @@ fs_visitor::lower_logical_sends()
ibld.sample_mask_reg());
break;
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
lower_surface_logical_send(ibld, inst,
SHADER_OPCODE_BYTE_SCATTERED_READ,
fs_reg());
break;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
lower_surface_logical_send(ibld, inst,
SHADER_OPCODE_BYTE_SCATTERED_WRITE,
......@@ -5036,6 +5056,7 @@ get_lowered_simd_width(const struct gen_device_info *devinfo,
case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
return MIN2(16, inst->exec_size);
case SHADER_OPCODE_URB_READ_SIMD8:
......
......@@ -656,6 +656,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_READ:
/* We only propagate into the surface argument of the
* instruction. Everything else goes through LOAD_PAYLOAD.
*/
......@@ -696,6 +697,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
inst->src[i] = val;
progress = true;
break;
......
......@@ -2086,6 +2086,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
inst->mlen, src[2].ud);
break;
case SHADER_OPCODE_BYTE_SCATTERED_READ:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_byte_scattered_read(p, dst, src[0], src[1],
inst->mlen, src[2].ud);
break;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_byte_scattered_write(p, src[0], src[1],
......
......@@ -161,6 +161,16 @@ namespace brw {
addr, tmp, surface, dims, op, rsize);
}
fs_reg
emit_byte_scattered_read(const fs_builder &bld,
const fs_reg &surface, const fs_reg &addr,
unsigned dims, unsigned size,
unsigned bit_size, brw_predicate pred)
{
return emit_send(bld, SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL,
addr, fs_reg(), surface, dims, bit_size, size, pred);
}
void
emit_byte_scattered_write(const fs_builder &bld, const fs_reg &surface,
const fs_reg &addr, const fs_reg &src,
......@@ -1202,4 +1212,3 @@ namespace brw {
}
}
}
......@@ -64,6 +64,13 @@ namespace brw {
unsigned dims, unsigned rsize, unsigned op,
brw_predicate pred = BRW_PREDICATE_NONE);
fs_reg
emit_byte_scattered_read(const fs_builder &bld,
const fs_reg &surface, const fs_reg &addr,
unsigned dims, unsigned size,
unsigned bit_size,
brw_predicate pred = BRW_PREDICATE_NONE);
void
emit_byte_scattered_write(const fs_builder &bld, const fs_reg &surface,
const fs_reg &addr, const fs_reg &src,
......
......@@ -293,6 +293,10 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op)
case SHADER_OPCODE_MEMORY_FENCE:
return "memory_fence";
case SHADER_OPCODE_BYTE_SCATTERED_READ:
return "byte_scattered_read";
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
return "byte_scattered_read_logical";
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
return "byte_scattered_write";
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
......@@ -999,6 +1003,8 @@ backend_instruction::is_volatile() const
case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_READ:
case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
case SHADER_OPCODE_URB_READ_SIMD8:
case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
case VEC4_OPCODE_URB_READ:
......
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