Commit 1a617d73 authored by Gert Wollny's avatar Gert Wollny

r600/sfn: Code cleanups

parent 43febeda
......@@ -8,10 +8,6 @@ CallStack::CallStack(r600_bytecode& bc):
}
CallStack::~CallStack()
{
}
int CallStack::push(unsigned type)
{
switch (type) {
......@@ -82,4 +78,4 @@ int CallStack::update_max_depth(unsigned type)
return elements;
}
}
\ No newline at end of file
}
......@@ -8,7 +8,6 @@ namespace r600 {
class CallStack {
public:
CallStack(r600_bytecode& bc);
~CallStack();
int push(unsigned type);
void pop(unsigned type);
int update_max_depth(unsigned type);
......@@ -18,4 +17,4 @@ private:
}
#endif // SFN_CALLSTACK_HH
\ No newline at end of file
#endif // SFN_CALLSTACK_HH
......@@ -19,8 +19,6 @@ struct StackFrame {
start(s)
{}
virtual ~StackFrame();
JumpType type;
r600_bytecode_cf *start;
vector<r600_bytecode_cf *> mid;
......@@ -33,28 +31,22 @@ using PStackFrame = shared_ptr<StackFrame>;
struct IfFrame : public StackFrame {
IfFrame(r600_bytecode_cf *s);
void fixup_mid(r600_bytecode_cf *cf) override;
void fixup_mid(r600_bytecode_cf *start) override;
void fixup_pop(r600_bytecode_cf *final) override;
};
struct LoopFrame : public StackFrame {
LoopFrame(r600_bytecode_cf *s);
void fixup_mid(r600_bytecode_cf *cf) override;
void fixup_mid(r600_bytecode_cf *start) override;
void fixup_pop(r600_bytecode_cf *final) override;
};
struct ConditionalJumpTrackerImpl {
ConditionalJumpTrackerImpl();
stack<PStackFrame> m_jump_stack;
stack<PStackFrame> m_loop_stack;
int m_current_loop_stack_pos;
int m_current_loop_stack_pos{0};
};
ConditionalJumpTrackerImpl::ConditionalJumpTrackerImpl():
m_current_loop_stack_pos(0)
{
}
ConditionalJumpTracker::~ConditionalJumpTracker()
{
......@@ -125,14 +117,11 @@ IfFrame::IfFrame(r600_bytecode_cf *s):
{
}
StackFrame::~StackFrame()
{
}
void IfFrame::fixup_mid(r600_bytecode_cf *source)
void IfFrame::fixup_mid(r600_bytecode_cf *start)
{
/* JUMP target is ELSE */
start->cf_addr = source->id;
start->cf_addr = start->id;
}
void IfFrame::fixup_pop(r600_bytecode_cf *final)
......@@ -149,7 +138,7 @@ LoopFrame::LoopFrame(r600_bytecode_cf *s):
{
}
void LoopFrame::fixup_mid(UNUSED r600_bytecode_cf *mid)
void LoopFrame::fixup_mid(UNUSED r600_bytecode_cf *start)
{
}
......@@ -167,4 +156,4 @@ void LoopFrame::fixup_pop(r600_bytecode_cf *final)
m->cf_addr = final->id;
}
}
\ No newline at end of file
}
......@@ -145,15 +145,15 @@ void EmitAluInstruction::split_constants(nir_alu_instr* instr)
return;
int nconst = 0;
std::array<PValue,4> c;
std::array<int,4> idx;
vector<PValue> c;
vector<int> idx;
for (unsigned i = 0; i < op_info->num_inputs; ++i) {
PValue src = from_nir(&instr->src[i], 0);
assert(src);
if (src->type() == Value::kconst) {
c[nconst] = src;
idx[nconst++] = i;
c.push_back(src);
idx.push_back(i);
++nconst;
}
}
if (nconst < 2)
......
......@@ -66,7 +66,7 @@ bool EmitTexInstruction::do_emit(nir_instr* instr)
}
}
bool EmitTexInstruction::emit_cube_txf(nir_tex_instr* instr)
bool EmitTexInstruction::emit_cube_txf(UNUSED nir_tex_instr* instr)
{
return false;
}
......@@ -478,7 +478,7 @@ bool EmitTexInstruction::emit_tex_txf(nir_tex_instr* instr)
int sampler_index = instr->sampler_index;
if (src.sampler_deref) {
if (src.sampler_deref->type() == Value::literal) {
const LiteralValue& val = static_cast<const LiteralValue&>(*src.sampler_deref);
const auto& val = dynamic_cast<const LiteralValue&>(*src.sampler_deref);
sampler_index = val.value();
} else {
return false;
......@@ -806,4 +806,4 @@ void EmitTexInstruction::handle_array_index(const nir_tex_instr& instr, GPRVecto
ir->set_flag(TexInstruction::z_unnormalized);
}
}
\ No newline at end of file
}
......@@ -31,9 +31,9 @@
namespace r600 {
WriteoutInstruction::WriteoutInstruction(instr_type t, const GPRVector& value):
WriteoutInstruction::WriteoutInstruction(instr_type t, GPRVector value):
Instruction(t),
m_value(value)
m_value(std::move(value))
{
}
......@@ -63,7 +63,7 @@ void WriteoutInstruction::do_evalue_liveness(LiverangeEvaluator& eval) const
void WriteoutInstruction::replace_values(const ValueSet& candiates, PValue new_value)
{
// I wonder whether we can actually end up here ...
for (auto c: candiates) {
for (auto& c: candiates) {
if (*c == *m_value.reg_i(c->chan()))
m_value.set_reg_i(c->chan(), new_value);
}
......@@ -191,7 +191,7 @@ MemRingOutIntruction::MemRingOutIntruction(ECFOpCode ring, EMemWriteType type,
m_type(type),
m_base_address(base_addr),
m_num_comp(ncomp),
m_index(index)
m_index(std::move(index))
{
assert(m_ring_op == cf_mem_ring || m_ring_op == cf_mem_ring1||
......@@ -247,7 +247,7 @@ void MemRingOutIntruction::replace_values_child(const ValueSet& candiates,
if (!m_index)
return;
for (auto c: candiates) {
for (auto& c: candiates) {
if (*c == *m_index)
m_index = new_value;
}
......
......@@ -39,7 +39,7 @@ public:
const GPRVector& gpr() const {return m_value;}
const GPRVector *gpr_ptr() const {return &m_value;}
protected:
WriteoutInstruction(instr_type t, const GPRVector& value);
WriteoutInstruction(instr_type t, GPRVector value);
private:
virtual void replace_values_child(const ValueSet& candiates, PValue new_value);
virtual void remap_registers_child(std::vector<rename_reg_pair>& map,
......@@ -143,4 +143,4 @@ private:
}
#endif // SFN_EXPORTINSTRUCTION_H
\ No newline at end of file
#endif // SFN_EXPORTINSTRUCTION_H
......@@ -41,10 +41,6 @@ Instruction::Instruction(instr_type t):
}
Instruction::~Instruction()
{
}
void Instruction::print(std::ostream& os) const
{
os << "OP:";
......@@ -53,7 +49,6 @@ void Instruction::print(std::ostream& os) const
void Instruction::replace_values(UNUSED const ValueSet& candiates, UNUSED PValue new_value)
{
}
void Instruction::evalue_liveness(LiverangeEvaluator& eval) const
......@@ -81,6 +76,8 @@ AluInstruction::AluInstruction(EAluOp opcode):
Instruction (Instruction::alu),
m_opcode(opcode),
m_src(alu_ops.at(opcode).nsrc),
m_omod(omod_off),
m_pred_sel(pred_off),
m_bank_swizzle(alu_vec_unknown),
m_cf_type(cf_alu)
{
......@@ -93,12 +90,14 @@ AluInstruction::AluInstruction(EAluOp opcode, PValue dest,
const std::set<AluModifiers>& flags):
Instruction (Instruction::alu),
m_opcode(opcode),
m_dest(dest),
m_dest(std::move(dest)),
m_omod(omod_off),
m_pred_sel(pred_off),
m_bank_swizzle(alu_vec_unknown),
m_cf_type(cf_alu)
{
m_src.swap(src);
for (auto f : flags)
for (auto f: flags)
m_flags.set(f);
if (alu_ops.at(opcode).nsrc == 3)
......@@ -108,7 +107,7 @@ AluInstruction::AluInstruction(EAluOp opcode, PValue dest,
bool AluInstruction::is_equal_to(const Instruction& lhs) const
{
assert(lhs.type() == alu);
const auto& oth = static_cast<const AluInstruction&>(lhs);
const auto& oth = dynamic_cast<const AluInstruction&>(lhs);
if (m_opcode != oth.m_opcode) {
return false;
......@@ -130,17 +129,17 @@ bool AluInstruction::is_equal_to(const Instruction& lhs) const
void AluInstruction::set_dest(PValue dest)
{
m_dest = dest;
m_dest = std::move(dest);
}
void AluInstruction::set_src(int i, PValue src)
{
m_src[i] = src;
m_src[i] = std::move(src);
}
void AluInstruction::replace_values(const ValueSet& candiates, PValue new_value)
{
for (auto c: candiates) {
for (auto& c: candiates) {
if (*c == *m_dest)
m_dest = new_value;
......@@ -169,7 +168,7 @@ void AluInstruction::remap_registers(std::vector<rename_reg_pair>& map,
if (m_dest->type() == Value::gpr) {
m_dest = remap_one_registers(m_dest, map, values);
} else if (m_dest->type() == Value::gpr_array_value) {
GPRArrayValue& val = static_cast<GPRArrayValue&>(*m_dest);
auto& val = dynamic_cast<GPRArrayValue&>(*m_dest);
auto value = val.value();
auto addr = val.indirect();
......@@ -189,7 +188,7 @@ void AluInstruction::remap_registers(std::vector<rename_reg_pair>& map,
if (s->type() == Value::gpr) {
s = remap_one_registers(s, map, values);
} else if (s->type() == Value::gpr_array_value) {
GPRArrayValue& val = static_cast<GPRArrayValue&>(*s);
auto& val = dynamic_cast<GPRArrayValue&>(*s);
auto value = val.value();
auto addr = val.indirect();
......@@ -275,13 +274,13 @@ void AluInstruction::do_print(std::ostream& os) const
PhiInstruction::PhiInstruction(PValue dst):
Instruction(phi),
m_dst(dst)
m_dst(std::move(dst))
{
}
void PhiInstruction::add_src(PValue src)
{
m_srcs.insert(src);
m_srcs.insert(std::move(src));
}
const ValueSet &PhiInstruction::srcs() const
......@@ -304,7 +303,7 @@ void PhiInstruction::do_evalue_liveness(LiverangeEvaluator& eval) const
void PhiInstruction::replace_values(const ValueSet& candiates, PValue new_value)
{
for (auto c: candiates) {
for (auto& c: candiates) {
if (*c == *m_dst)
m_dst = new_value;
......@@ -325,7 +324,7 @@ void PhiInstruction::remap_registers(UNUSED std::vector<rename_reg_pair>& map,
bool PhiInstruction::is_equal_to(const Instruction& lhs) const
{
assert(lhs.type() == phi);
const PhiInstruction& other = dynamic_cast<const PhiInstruction&>(lhs);
const auto& other = dynamic_cast<const PhiInstruction&>(lhs);
if (*other.m_dst != *m_dst)
return false;
......@@ -343,24 +342,24 @@ bool PhiInstruction::is_equal_to(const Instruction& lhs) const
void PhiInstruction::do_print(std::ostream& os) const
{
os << "PHI: " << *m_dst << " := (";
for (auto i: m_srcs)
for (const auto& i: m_srcs)
os << *i << " ";
os << ")";
}
TexInstruction::TexInstruction(Opcode op, const GPRVector &dest, const GPRVector &src,
TexInstruction::TexInstruction(Opcode op, GPRVector dest, GPRVector src,
unsigned sid, unsigned rid):
Instruction(tex),
m_opcode(op),
m_dst(dest),
m_src(src),
m_dst(std::move(dest)),
m_src(std::move(src)),
m_sampler_id(sid),
m_resource_id(rid),
m_flags(0),
m_inst_mode(0)
m_inst_mode(0),
m_offset{0,0,0}
{
memset(m_offset, 0, sizeof (m_offset));
}
void TexInstruction::set_gather_comp(int cmp)
......@@ -399,7 +398,7 @@ void TexInstruction::do_evalue_liveness(LiverangeEvaluator& eval) const
void TexInstruction::replace_values(const ValueSet& candiates, PValue new_value)
{
// I wonder whether we can actually end up here ...
for (auto c: candiates) {
for (auto& c: candiates) {
if (*c == *m_src.reg_i(c->chan()))
m_src.set_reg_i(c->chan(), new_value);
if (*c == *m_dst.reg_i(c->chan()))
......@@ -422,7 +421,7 @@ int TexInstruction::get_offset(unsigned index) const
bool TexInstruction::is_equal_to(const Instruction& rhs) const
{
assert(rhs.type() == tex);
const auto& r = static_cast<const TexInstruction&>(rhs);
const auto& r = dynamic_cast<const TexInstruction&>(rhs);
return (m_opcode == r.m_opcode &&
m_dst == r.m_dst &&
m_src == r.m_src &&
......@@ -481,10 +480,10 @@ FetchInstruction::FetchInstruction(EVFetchInstr op,
m_vc_opcode(op),
m_fetch_type(type),
m_endian_swap(vtx_es_none),
m_src(src),
m_dst(dst),
m_src(std::move(src)),
m_dst(std::move(dst)),
m_offset(offset),
m_is_mega_fetch(1),
m_is_mega_fetch(true),
m_mega_fetch_count(16),
m_buffer_id(buffer_id),
m_semantic_id(0),
......@@ -513,10 +512,10 @@ FetchInstruction::FetchInstruction(GPRVector dst,
m_data_format(fmt_32_32_32_32),
m_num_format(vtx_nf_norm),
m_endian_swap(vtx_es_none),
m_src(src),
m_dst(dst),
m_src(std::move(src)),
m_dst(std::move(dst)),
m_offset(0),
m_is_mega_fetch(0),
m_is_mega_fetch(false),
m_mega_fetch_count(16),
m_buffer_id(buffer_id),
m_semantic_id(0),
......@@ -529,7 +528,7 @@ FetchInstruction::FetchInstruction(GPRVector dst,
void FetchInstruction::replace_values(const ValueSet& candiates, PValue new_value)
{
for (auto c: candiates) {
for (auto& c: candiates) {
for (int i = 0; i < 4; ++i) {
if (*c == *m_dst.reg_i(i))
m_dst.set_reg_i(i, new_value);
......@@ -572,7 +571,7 @@ void FetchInstruction::do_evalue_liveness(LiverangeEvaluator& eval) const
bool FetchInstruction::is_equal_to(const Instruction& lhs) const
{
auto& l = static_cast<const FetchInstruction&>(lhs);
auto& l = dynamic_cast<const FetchInstruction&>(lhs);
return m_vc_opcode == l.m_vc_opcode &&
m_fetch_type == l.m_fetch_type &&
m_data_format == l.m_data_format &&
......@@ -719,7 +718,7 @@ EmitVertex::EmitVertex(int stream, bool cut):
bool EmitVertex::is_equal_to(const Instruction& lhs) const
{
auto& oth = static_cast<const EmitVertex&>(lhs);
auto& oth = dynamic_cast<const EmitVertex&>(lhs);
return oth.m_stream == m_stream &&
oth.m_cut == m_cut;
}
......
......@@ -75,13 +75,13 @@ public:
unknown
};
typedef std::shared_ptr<Instruction> Pointer;
using Pointer = std::shared_ptr<Instruction>;
friend bool operator == (const Instruction& lhs, const Instruction& rhs);
Instruction(instr_type t);
virtual ~Instruction();
virtual ~Instruction() = default;
instr_type type() const { return m_type;}
......@@ -253,7 +253,7 @@ public:
w_unnormalized
};
TexInstruction(Opcode op, const GPRVector& dest, const GPRVector& src, unsigned sid, unsigned rid);
TexInstruction(Opcode op, GPRVector dest, GPRVector src, unsigned sid, unsigned rid);
const GPRVector& src() const {return m_src;}
const GPRVector& dst() const {return m_dst;}
......@@ -293,8 +293,8 @@ private:
unsigned m_sampler_id;
unsigned m_resource_id;
std::bitset<4> m_flags;
int m_offset[3];
int m_inst_mode;
int m_offset[3];
};
class PhiInstruction : public Instruction {
......
......@@ -62,7 +62,7 @@ private:
bool emit_fs_pixel_export(const ExportInstruction & exi);
bool emit_vs_pos_export(const ExportInstruction & exi);
bool emit_vs_param_export(const ExportInstruction & exi);
bool copy_dst(r600_bytecode_alu_dst& dst, const Value& src);
bool copy_dst(r600_bytecode_alu_dst& dst, const Value& d);
bool copy_src(r600_bytecode_alu_src& src, const Value& s);
ConditionalJumpTracker m_jump_tracker;
......@@ -168,12 +168,6 @@ bool AssemblyFromShaderLegacy::do_lower(const std::vector<Instruction::Pointer>&
if (i->type() != Instruction::alu)
impl->reset_addr_register();
}
/*
for (const auto& i : exports) {
if (!impl->emit_export(static_cast<const ExportInstruction&>(*i)))
return false;
}*/
const struct cf_op_info *last = nullptr;
if (impl->m_bc->cf_last)
......@@ -916,4 +910,4 @@ const std::map<EAluOp, int> opcode_map = {
{op3_mul_lit, ALU_OP3_MUL_LIT},
};
}
\ No newline at end of file
}
......@@ -53,7 +53,7 @@ extern SfnLog sfn_log;
class ShaderFromNirProcessor : public ValuePool {
public:
ShaderFromNirProcessor(pipe_shader_type ptype, r600_shader& sh_info);
virtual ~ShaderFromNirProcessor();
virtual ~ShaderFromNirProcessor() = default;
void emit_instruction(Instruction *ir);
void emit_load_constants(const nir_src& src, unsigned writemask);
......@@ -179,7 +179,7 @@ public:
class ShaderFromNir {
public:
ShaderFromNir();
~ShaderFromNir();
~ShaderFromNir() = default;
unsigned ninputs() const;
......@@ -214,7 +214,7 @@ private:
class AssemblyFromShader {
public:
virtual ~AssemblyFromShader();
virtual ~AssemblyFromShader() = default;
bool lower(const std::vector<Instruction::Pointer>& ir);
private:
virtual bool do_lower(const std::vector<Instruction::Pointer>& ir) = 0 ;
......@@ -222,4 +222,4 @@ private:
}
#endif
\ No newline at end of file
#endif
......@@ -48,9 +48,6 @@ ShaderInput::ShaderInput(tgsi_semantic name):
{
}
ShaderInput::~ShaderInput()
{
}
void ShaderInput::set_lds_pos(UNUSED int lds_pos)
{
......
......@@ -40,9 +40,10 @@ namespace r600 {
class ShaderInput {
public:
ShaderInput();
virtual ~ShaderInput();
ShaderInput(tgsi_semantic name);
virtual ~ShaderInput() = default;
tgsi_semantic name() const {return m_name;}
void set_gpr(int gpr) {m_gpr = gpr;}
......@@ -66,7 +67,7 @@ using PShaderInput = std::shared_ptr<ShaderInput>;
class ShaderInputSystemValue: public ShaderInput {
public:
ShaderInputSystemValue(tgsi_semantic name, int gpr);
void set_specific_ioinfo(r600_shader_io& io) const;
void set_specific_ioinfo(r600_shader_io& io) const override;
int m_gpr;
};
......@@ -157,4 +158,4 @@ private:
}
#endif // SFN_SHADERIO_H
\ No newline at end of file
#endif // SFN_SHADERIO_H
......@@ -7,18 +7,13 @@ namespace r600 {
class stderr_streambuf : public std::streambuf
{
public:
stderr_streambuf();
stderr_streambuf() = default;
protected:
int sync();
int overflow(int c);
std::streamsize xsputn ( const char *s, std::streamsize n );
int sync() override;
int overflow(int c) override;
std::streamsize xsputn ( const char *s, std::streamsize n ) override;
};
stderr_streambuf::stderr_streambuf()
{
}
int stderr_streambuf::sync()
{
fflush(stderr);
......@@ -35,7 +30,6 @@ static const struct debug_named_value sfn_debug_options[] = {
{"instr", SfnLog::instr, "Log all consumed nir instructions"},
{"ir", SfnLog::r600ir, "Log created R600 IR"},
{"cc", SfnLog::cc, "Log R600 IR to assembly code creation"},
{"err", SfnLog::err, "Log shader conversion errors"},
{"si", SfnLog::shader_info, "Log shader info (non-zero values)"},
{"ts", SfnLog::test_shader, "Log shaders in tests"},
{"reg", SfnLog::reg, "Log register allocation and lookup"},
......@@ -46,6 +40,7 @@ static const struct debug_named_value sfn_debug_options[] = {
{"nomerge", SfnLog::nomerge, "Skup egister merge step"},
{"tex", SfnLog::tex, "Log texture ops"},
{"trans", SfnLog::trans, "Log generic translation messages"},
{"noerror", SfnLog::noerror, "disable logging of errors"},
DEBUG_NAMED_VALUE_END
};
......@@ -65,6 +60,9 @@ SfnLog::SfnLog():
m_output(new stderr_streambuf())
{
m_log_mask = debug_get_flags_option("R600_NIR_DEBUG", sfn_debug_options, 0);
if (!(m_log_mask & noerror)) {
m_log_mask |= err;
}
}
SfnLog& SfnLog::operator << (SfnLog::LogFlag const l)
......@@ -94,4 +92,4 @@ SfnLog& SfnLog::operator << (nir_instr &instr)
return *this;
}
}
\ No newline at end of file
}
......@@ -30,6 +30,7 @@ public:
trans = 1 << 12,
all = (1 << 13) - 1,
nomerge = 1 << 16,
noerror = 1 << 17,
};
SfnLog();
......@@ -75,4 +76,4 @@ private:
extern SfnLog sfn_log;
}
#endif // SFN_STDERR_STREAMBUF_H
\ No newline at end of file
#endif // SFN_STDERR_STREAMBUF_H
......@@ -501,6 +501,7 @@ PValue Value::zero(new InlineConstValue(ALU_SRC_0, 0));
PValue Value::one_f(new InlineConstValue(ALU_SRC_1, 0));
PValue Value::one_i(new InlineConstValue(ALU_SRC_1_INT, 0));
PValue Value::zero_dot_5(new InlineConstValue(ALU_SRC_0_5, 0));
PValue Value::dummy_target(new GPRValue(0, 0));
InlineConstValue::InlineConstValue(int value, int chan):
SpecialValue(Value::cinline, value, chan)
......
......@@ -136,6 +136,7 @@ public:
static Value::Pointer one_f;
static Value::Pointer zero_dot_5;
static Value::Pointer one_i;
static Value::Pointer dummy_target;
protected:
Value(Type type, uint32_t chan);
......
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