Commit 7cbca9cf authored by Gert Wollny's avatar Gert Wollny Committed by Marge Bot

r600/sfn: Move emission of barrier from compute shader to shader base

Tess shaders also use these barriers.
Signed-off-by: Gert Wollny's avatarGert Wollny <gert.wollny@collabora.com>
Part-of: <mesa/mesa!4714>
parent 46a3033b
......@@ -535,6 +535,10 @@ bool ShaderFromNirProcessor::emit_intrinsic_instruction(nir_intrinsic_instr* ins
return emit_load_local_shared(instr);
case nir_intrinsic_store_local_shared_r600:
return emit_store_local_shared(instr);
case nir_intrinsic_control_barrier:
case nir_intrinsic_memory_barrier_tcs_patch:
return emit_barrier(instr);
default:
fprintf(stderr, "r600-nir: Unsupported intrinsic %d\n", instr->intrinsic);
return false;
......@@ -553,6 +557,15 @@ ShaderFromNirProcessor::emit_load_function_temp(UNUSED const nir_variable *var,
return false;
}
bool ShaderFromNirProcessor::emit_barrier(UNUSED nir_intrinsic_instr* instr)
{
AluInstruction *ir = new AluInstruction(op0_group_barrier);
ir->set_flag(alu_last_instr);
emit_instruction(ir);
return true;
}
bool ShaderFromNirProcessor::load_preloaded_value(const nir_dest& dest, int chan, PValue value, bool as_last)
{
if (!dest.is_ssa) {
......
......@@ -102,6 +102,7 @@ protected:
bool emit_load_local_shared(nir_intrinsic_instr* instr);
bool emit_store_local_shared(nir_intrinsic_instr* instr);
bool emit_barrier(nir_intrinsic_instr* instr);
const GPRVector *output_register(unsigned location) const;
bool load_preloaded_value(const nir_dest& dest, int chan, PValue value,
......
......@@ -70,8 +70,6 @@ bool ComputeShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_ins
return emit_load_3vec(instr, m_workgroup_id);
case nir_intrinsic_load_num_work_groups:
return emit_load_num_work_groups(instr);
case nir_intrinsic_control_barrier:
return emit_barrier(instr);
default:
return false;
}
......@@ -89,14 +87,6 @@ bool ComputeShaderFromNir::emit_load_3vec(nir_intrinsic_instr* instr,
return true;
}
bool ComputeShaderFromNir::emit_barrier(UNUSED nir_intrinsic_instr* instr)
{
AluInstruction *ir = new AluInstruction(op0_group_barrier);
ir->set_flag(alu_last_instr);
emit_instruction(ir);
return true;
}
bool ComputeShaderFromNir::emit_load_num_work_groups(nir_intrinsic_instr* instr)
{
int temp = allocate_temp_register();
......
......@@ -54,7 +54,6 @@ private:
bool emit_load_3vec(nir_intrinsic_instr* instr, const std::array<PValue,3>& src);
bool emit_load_num_work_groups(nir_intrinsic_instr* instr);
bool emit_barrier(nir_intrinsic_instr* instr);
int m_reserved_registers;
std::array<PValue,3> m_workgroup_id;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment