<7> [407.110982] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [407.111041] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pre csc lut: 0 entries, post csc lut: 0 entries
<7> [407.111100] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] output csc: pre offsets: 0x0000 0x0000 0x0000
<7> [407.111165] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111238] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111299] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111358] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] output csc: post offsets: 0x0000 0x0000 0x0000
<7> [407.111417] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pipe csc: pre offsets: 0x0000 0x0000 0x0000
<7> [407.111475] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111534] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111594] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [407.111653] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] pipe csc: post offsets: 0x0000 0x0000 0x0000
<7> [407.111712] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:188:plane 1D] fb: [NOFB], visible: no
<7> [407.111772] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:197:plane 2D] fb: [NOFB], visible: no
<7> [407.111832] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:206:plane 3D] fb: [NOFB], visible: no
<7> [407.111892] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:215:plane 4D] fb: [FB:391] 1920x1080 format = XR24 little-endian (0x34325258) modifier = 0x100000000000001, visible: yes
<7> [407.111955] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [407.112015] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [407.112075] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:224:plane 5D] fb: [FB:392] 64x64 format = XR24 little-endian (0x34325258) modifier = 0x100000000000001, visible: yes
<7> [407.112135] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [407.112194] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] src: 64.000000x64.000000+0.000000+0.000000 dst: 64x64+0+1016
<7> [407.112253] xe 0000:03:00.0: [drm:intel_crtc_state_dump [xe]] [PLANE:233:cursor D] fb: [NOFB], visible: no
<7> [407.112666] xe 0000:03:00.0: [drm:intel_audio_codec_disable [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G] Disable audio codec on [CRTC:238:pipe D]
<7> [407.145642] xe 0000:03:00.0: [drm:i915_audio_component_get_eld [xe]] Not valid for port E
<7> [407.146416] xe 0000:03:00.0: [drm:intel_disable_transcoder [xe]] disabling pipe D
<7> [407.165599] xe 0000:03:00.0: [drm:intel_power_well_enable [xe]] enabling AUX_TC2
<7> [407.167783] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:240:DDI TC1/PHY F]
<7> [407.168151] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:242:DP-MST A]
<7> [407.168346] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:243:DP-MST B]
<7> [407.168529] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:244:DP-MST C]
<7> [407.168701] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:245:DP-MST D]
<7> [407.168868] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:259:DDI TC2/PHY G]
<7> [407.169033] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:261:DP-MST A]
<7> [407.169194] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:262:DP-MST B]
<7> [407.169364] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:263:DP-MST C]
<7> [407.169537] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:264:DP-MST D]
<7> [407.169709] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:271:DDI TC3/PHY H]
<7> [407.169886] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:275:DDI TC4/PHY I]
<7> [407.170060] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:277:DP-MST A]
<7> [407.170242] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:278:DP-MST B]
<7> [407.170415] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:279:DP-MST C]
<7> [407.170597] xe 0000:03:00.0: [drm:intel_modeset_verify_disabled [xe]] [ENCODER:280:DP-MST D]
<7> [407.175263] xe 0000:03:00.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC2/DDI TC2/PHY G: DPCD: 12 14 c4 01 01 15 01 81 00 01 04 01 0f 00 01
<7> [407.183169] xe 0000:03:00.0: [drm:intel_dp_init_lttpr_and_dprx_caps [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] LTTPR common capabilities: 00 00 00 00 00 00 00 00
<7> [407.184806] xe 0000:03:00.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC2/DDI TC2/PHY G: DPCD: 12 14 c4 01 01 15 01 81 00 01 04 01 0f 00 01
<7> [407.185237] xe 0000:03:00.0: [drm:intel_dp_start_link_train [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Using LINK_BW_SET value 0a
<7> [407.186353] xe 0000:03:00.0: [drm:intel_dp_set_signal_levels [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] 8b/10b, lanes: 4, vswing levels: 0/0/0/0, pre-emphasis levels: 0/0/0/0
<7> [407.186880] xe 0000:03:00.0: [drm:intel_dp_program_link_training_pattern [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Using DP training pattern TPS1
<7> [407.196354] xe 0000:03:00.0: [drm:intel_dp_link_train_phy [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Clock recovery OK
<7> [407.196744] xe 0000:03:00.0: [drm:intel_dp_program_link_training_pattern [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Using DP training pattern TPS3
<7> [407.204222] xe 0000:03:00.0: [drm:intel_dp_link_train_phy [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Channel EQ done. DP Training successful
<7> [407.204719] xe 0000:03:00.0: [drm:intel_dp_link_train_phy [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G][DPRX] Link Training passed at link rate = 270000, lane count = 4
<7> [407.205835] xe 0000:03:00.0: [drm:intel_enable_transcoder [xe]] enabling pipe D
<7> [407.223582] xe 0000:03:00.0: [drm:intel_audio_codec_enable [xe]] [CONNECTOR:260:DP-2][ENCODER:259:DDI TC2/PHY G] Enable audio codec on [CRTC:238:pipe D], 40 bytes ELD
<7> [407.239989] xe 0000:03:00.0: [drm:verify_connector_state [xe]] [CONNECTOR:260:DP-2]
<7> [407.240333] xe 0000:03:00.0: [drm:intel_modeset_verify_crtc [xe]] [CRTC:238:pipe D]
<7> [407.243908] xe 0000:03:00.0: [drm:i915_fifo_underrun_reset_write [xe]] Re-arming FIFO underruns on pipe D
<7> [407.311390] xe 0000:03:00.0: [drm:intel_power_well_disable [xe]] disabling AUX_TC2
<7> [407.323282] xe 0000:03:00.0: [drm:drm_mode_rmfb_work_fn [drm]] Removing [FB:392] from all active usage due to RMFB ioctl
<7> [407.323346] xe 0000:03:00.0: [drm:atomic_remove_fb [drm]] Disabling [PLANE:224:plane 5D] because [FB:392] is removed
<7> [407.323407] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] ddb ( 0 - 1946) -> ( 0 - 1989), size 1946 -> 1989
<7> [407.323497] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:224:plane 5D] ddb (1946 - 1989) -> ( 0 - 0), size 43 -> 0
<7> [407.323562] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:224:plane 5D] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5, wm6, wm7,*twm,*swm, stwm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm
<7> [407.323622] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:224:plane 5D] lines 7, 3, 7, 11, 17, 17, 17, 17, 0, 15, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.323678] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:224:plane 5D] blocks 15, 7, 15, 23, 35, 35, 35, 35, 29, 31, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.323734] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:224:plane 5D] min_ddb 18, 9, 18, 27, 40, 40, 0, 0, 30, 36, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.323789] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] [CRTC:238:pipe D] data rate 594000 num active planes 1
<7> [407.323863] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] QGV point 0: max bw 33600 required 594 qgv_peak_bw: 48000
<7> [407.323932] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] QGV point 1: max bw 53000 required 594 qgv_peak_bw: 48000
<7> [407.324001] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] Matching peaks QGV bw: 48000 for required data rate: 594
<7> [407.340377] xe 0000:03:00.0: [drm:drm_mode_rmfb_work_fn [drm]] Removing [FB:391] from all active usage due to RMFB ioctl
<7> [407.340432] xe 0000:03:00.0: [drm:atomic_remove_fb [drm]] Disabling [PLANE:215:plane 4D] because [FB:391] is removed
<7> [407.340489] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] ddb ( 0 - 1989) -> ( 0 - 0), size 1989 -> 0
<7> [407.340574] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5, wm6, wm7,*twm,*swm,*stwm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm
<7> [407.340634] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] lines 1, 3, 7, 11, 17, 17, 17, 17, 0, 15, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.340694] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] blocks 16, 49, 113, 177, 273, 273, 273, 273, 30, 241, 255 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.340752] xe 0000:03:00.0: [drm:skl_compute_wm [xe]] [PLANE:215:plane 4D] min_ddb 19, 55, 126, 196, 302, 302, 0, 0, 31, 267, 267 -> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [407.340809] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] [CRTC:238:pipe D] data rate 0 num active planes 0
<7> [407.340882] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] QGV point 0: max bw 33600 required 0 qgv_peak_bw: 48000
<7> [407.340952] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] QGV point 1: max bw 53000 required 0 qgv_peak_bw: 48000
<7> [407.341019] xe 0000:03:00.0: [drm:intel_bw_atomic_check [xe]] Matching peaks QGV bw: 48000 for required data rate: 0
<7> [407.357457] xe 0000:03:00.0: [drm:drm_mode_addfb2 [drm]] [FB:391]
<7> [407.379936] xe 0000:03:00.0: [drm:drm_mode_addfb2 [drm]] [FB:392]
<7> [407.390288] xe 0000:03:00.0: [drm:drm_mode_addfb2 [drm]] [FB:393]
<7> [407.401576] xe 0000:03:00.0: [drm:drm_mode_addfb2 [drm]] [FB:394]