Stdout
Using IGT_SRANDOM=1727499738 for randomisation
Opened device: /dev/dri/card0
Big framebuffer size 16384x16384
Stderr
(kms_psr2_sf:2136) igt_core-CRITICAL: Unknown subtest: primary-plane-update-sf-dmg-area-big-fb
Dmesg
<7> [841.422059] xe 0000:00:02.0: [drm:intel_power_well_disable [xe]] disabling DC_off
<7> [841.422169] xe 0000:00:02.0: [drm:skl_enable_dc6 [xe]] Enabling DC6
<7> [841.422232] xe 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [xe]] Setting DC state from 00 to 02
<6> [841.429916] Console: switching to colour dummy device 80x25
<6> [841.430336] [IGT] kms_psr2_sf: executing
<7> [841.434889] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1]
<7> [841.434904] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:198:DP-1]
<7> [841.435055] xe 0000:00:02.0: [drm:intel_tc_port_update_mode [xe]] Port D/TC#1: TC port mode reset (disconnected -> dp-alt)
<7> [841.435163] xe 0000:00:02.0: [drm:intel_power_well_enable [xe]] enabling AUX_TC1
<7> [841.436435] xe 0000:00:02.0: [drm:intel_power_well_enable [xe]] enabling PICA_TC
<7> [841.441450] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: Base DPCD: 12 14 c4 81 01 01 03 80 02 02 06 00 00 00 81
<7> [841.441469] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DPCD: 14 1e c4 81 01 00 03 80 02 02 06 00 00 00 81
<7> [841.442937] xe 0000:00:02.0: [drm:intel_dp_init_lttpr_and_dprx_caps [xe]] [CONNECTOR:198:DP-1][ENCODER:197:DDI TC1/PHY TC1][DPRX] LTTPR common capabilities: 20 1e 80 aa 04 00 01 03
<7> [841.445919] xe 0000:00:02.0: [drm:intel_dp_init_lttpr_and_dprx_caps [xe]] [CONNECTOR:198:DP-1][ENCODER:197:DDI TC1/PHY TC1][LTTPR 1] PHY capabilities: 04 00 00
<7> [841.447510] xe 0000:00:02.0: [drm:drm_dp_dump_desc [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: LTTPR 1: OUI 98-4f-ee dev-ID HBR HW-rev 10.2 SW-rev 2.11 quirks 0x0000
<7> [841.451711] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: Base DPCD: 12 14 c4 81 01 01 03 80 02 02 06 00 00 00 81
<7> [841.451734] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DPCD: 14 1e c4 81 01 00 03 80 02 02 06 00 00 00 81
<7> [841.453208] xe 0000:00:02.0: [drm:drm_dp_dump_desc [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DP sink: OUI 00-0c-e7 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0020
<7> [841.457580] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [ENCODER:197:DDI TC1/PHY TC1] MST support: port: yes, sink: MST, modparam: yes -> enable: MST
<7> [841.464078] xe 0000:00:02.0: [drm:intel_dp_read_dsc_dpcd [xe]] DSC DPCD: 01 21 03 7f 3b 07 01 00 00 1f 0e 11 08 00 00 00
<7> [841.465596] xe 0000:00:02.0: [drm:intel_dp_get_dsc_sink_cap [xe]] FEC CAPABILITY: ff
<7> [841.467118] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000, 810000, 1000000, 2000000
<7> [841.467190] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] sink rates: 162000, 270000, 540000, 810000, 1000000
<7> [841.467247] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] common rates: 162000, 270000, 540000, 810000, 1000000
<7> [841.467305] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1] disconnected
<7> [841.467626] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2]
<7> [841.467636] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:210:DP-2]
<7> [841.467719] xe 0000:00:02.0: [drm:intel_power_well_disable [xe]] disabling PICA_TC
<7> [841.467790] xe 0000:00:02.0: [drm:intel_power_well_disable [xe]] disabling AUX_TC1
<7> [841.467900] xe 0000:00:02.0: [drm:intel_tc_port_update_mode [xe]] Port E/TC#2: TC port mode reset (disconnected -> tbt-alt)
<7> [841.467965] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2] disconnected
<7> [841.468181] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3]
<7> [841.468188] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:218:DP-3]
<7> [841.468272] xe 0000:00:02.0: [drm:intel_tc_port_update_mode [xe]] Port F/TC#3: TC port mode reset (disconnected -> tbt-alt)
<7> [841.468334] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3] disconnected
<7> [841.468613] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:189:eDP-1]
<7> [841.468621] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:189:eDP-1]
<7> [841.469286] xe 0000:00:02.0: [drm:intel_dp_read_dsc_dpcd [xe]] DSC DPCD: 01 21 00 76 0a 02 01 80 00 01 06 66 08 00 00 00
<7> [841.469765] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000, 810000
<7> [841.469827] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] sink rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000
<7> [841.469888] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] common rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000
<7> [841.469993] xe 0000:00:02.0: [drm:update_display_info.part.0 [drm]] [CONNECTOR:189:eDP-1] Supported Monitor Refresh rate range is 40 Hz - 240 Hz
<7> [841.470034] xe 0000:00:02.0: [drm:update_display_info.part.0 [drm]] [CONNECTOR:189:eDP-1] DisplayID extension version 0x20, primary use 0x02
<7> [841.470053] xe 0000:00:02.0: [drm:update_display_info.part.0 [drm]] [CONNECTOR:189:eDP-1] Assigning EDID-1.4 digital sink color depth as 10 bpc.
<7> [841.470071] xe 0000:00:02.0: [drm:update_display_info.part.0 [drm]] [CONNECTOR:189:eDP-1] ELD monitor NE160QDM-NZ7
<7> [841.470088] xe 0000:00:02.0: [drm:update_display_info.part.0 [drm]] [CONNECTOR:189:eDP-1] ELD size 32, SAD count 0
<7> [841.470122] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] VRR capable: yes
<7> [841.470184] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] DFP max bpc 0, max dotclock 0, TMDS clock 0-0, PCON Max FRL BW 0Gbps
<7> [841.470844] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] PCON ENCODER DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00
<7> [841.470909] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] RGB->YcbCr conversion? no, YCbCr 4:2:0 allowed? yes, YCbCr 4:4:4->4:2:0 conversion? no
<7> [841.471453] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:189:eDP-1] probed modes:
<7> [841.471461] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] Probed mode: "2560x1600": 240 1175040 2560 2608 2640 2720 1600 1663 1669 1800 0x48 0xa
<7> [841.471468] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] Probed mode: "2560x1600": 60 293760 2560 2608 2640 2720 1600 1663 1669 1800 0x48 0xa
<7> [841.471485] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1]
<7> [841.471492] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:198:DP-1]
<7> [841.471635] xe 0000:00:02.0: [drm:intel_power_well_enable [xe]] enabling AUX_TC1
<7> [841.472909] xe 0000:00:02.0: [drm:intel_power_well_enable [xe]] enabling PICA_TC
<7> [841.477919] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: Base DPCD: 12 14 c4 81 01 01 03 80 02 02 06 00 00 00 81
<7> [841.477935] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DPCD: 14 1e c4 81 01 00 03 80 02 02 06 00 00 00 81
<7> [841.479412] xe 0000:00:02.0: [drm:intel_dp_init_lttpr_and_dprx_caps [xe]] [CONNECTOR:198:DP-1][ENCODER:197:DDI TC1/PHY TC1][DPRX] LTTPR common capabilities: 20 1e 80 aa 04 00 01 03
<7> [841.482377] xe 0000:00:02.0: [drm:intel_dp_init_lttpr_and_dprx_caps [xe]] [CONNECTOR:198:DP-1][ENCODER:197:DDI TC1/PHY TC1][LTTPR 1] PHY capabilities: 04 00 00
<7> [841.483906] xe 0000:00:02.0: [drm:drm_dp_dump_desc [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: LTTPR 1: OUI 98-4f-ee dev-ID HBR HW-rev 10.2 SW-rev 2.11 quirks 0x0000
<7> [841.488098] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: Base DPCD: 12 14 c4 81 01 01 03 80 02 02 06 00 00 00 81
<7> [841.488107] xe 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DPCD: 14 1e c4 81 01 00 03 80 02 02 06 00 00 00 81
<7> [841.489576] xe 0000:00:02.0: [drm:drm_dp_dump_desc [drm_display_helper]] AUX USBC1/DDI TC1/PHY TC1: DP sink: OUI 00-0c-e7 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0020
<7> [841.493934] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [ENCODER:197:DDI TC1/PHY TC1] MST support: port: yes, sink: MST, modparam: yes -> enable: MST
<7> [841.500982] xe 0000:00:02.0: [drm:intel_dp_read_dsc_dpcd [xe]] DSC DPCD: 01 21 03 7f 3b 07 01 00 00 1f 0e 11 08 00 00 00
<7> [841.502517] xe 0000:00:02.0: [drm:intel_dp_get_dsc_sink_cap [xe]] FEC CAPABILITY: ff