igt@xe_drm_fdinfo@drm-most-busy-idle-check-all - fail - Test assertion failure function check_results, Failed assertion: percent >= 95 && percent <= 100
Starting subtest: drm-most-busy-idle-check-all
(xe_drm_fdinfo:1744) CRITICAL: Test assertion failure function check_results, file ../../../usr/src/igt-gpu-tools/tests/intel/xe_drm_fdinfo.c:487:
(xe_drm_fdinfo:1744) CRITICAL: Failed assertion: percent >= 95 && percent <= 100
Subtest drm-most-busy-idle-check-all failed.
**** DEBUG ****
(xe_drm_fdinfo:1744) DEBUG: bcs: spinner started
(xe_drm_fdinfo:1744) DEBUG: ccs: spinner started
(xe_drm_fdinfo:1744) DEBUG: vcs: spinner started
(xe_drm_fdinfo:1744) DEBUG: vecs: spinner started
(xe_drm_fdinfo:1744) DEBUG: bcs: spinner ended
(xe_drm_fdinfo:1744) DEBUG: vcs: spinner ended
(xe_drm_fdinfo:1744) DEBUG: vecs: spinner ended
(xe_drm_fdinfo:1744) DEBUG: ccs: spinner ended
(xe_drm_fdinfo:1744) DEBUG: bcs: sample 1: cycles 0, total_cycles 5602691463
(xe_drm_fdinfo:1744) DEBUG: bcs: sample 2: cycles 9657732, total_cycles 5612356523
(xe_drm_fdinfo:1744) DEBUG: bcs: percent: 99.000000
(xe_drm_fdinfo:1744) DEBUG: vcs: sample 1: cycles 0, total_cycles 5602691463
(xe_drm_fdinfo:1744) DEBUG: vcs: sample 2: cycles 9640872, total_cycles 5612356523
(xe_drm_fdinfo:1744) DEBUG: vcs: percent: 99.000000
(xe_drm_fdinfo:1744) DEBUG: vecs: sample 1: cycles 0, total_cycles 5602691463
(xe_drm_fdinfo:1744) DEBUG: vecs: sample 2: cycles 9634842, total_cycles 5612356523
(xe_drm_fdinfo:1744) DEBUG: vecs: percent: 99.000000
(xe_drm_fdinfo:1744) DEBUG: ccs: sample 1: cycles 0, total_cycles 5602691463
(xe_drm_fdinfo:1744) DEBUG: ccs: sample 2: cycles 9673996, total_cycles 5612356523
(xe_drm_fdinfo:1744) DEBUG: ccs: percent: 100.000000
(xe_drm_fdinfo:1744) DEBUG: rcs: spinner started
(xe_drm_fdinfo:1744) DEBUG: ccs: spinner started
(xe_drm_fdinfo:1744) DEBUG: vcs: spinner started
(xe_drm_fdinfo:1744) DEBUG: vecs: spinner started
(xe_drm_fdinfo:1744) DEBUG: rcs: spinner ended