Stdout
Using IGT_SRANDOM=1714123999 for randomisation
Opened device: /dev/dri/card0
Starting subtest: viewport
Using (pipe A + eDP-1) to run the subtest.
Starting dynamic subtest: pipe-A-eDP-1-size-64
Dynamic subtest pipe-A-eDP-1-size-64: SUCCESS (3.499s)
Starting dynamic subtest: pipe-A-eDP-1-size-128
Dynamic subtest pipe-A-eDP-1-size-128: SUCCESS (3.468s)
Starting dynamic subtest: pipe-A-eDP-1-size-256
Dynamic subtest pipe-A-eDP-1-size-256: SUCCESS (3.467s)
Using (pipe B + eDP-1) to run the subtest.
Starting dynamic subtest: pipe-B-eDP-1-size-64
Dynamic subtest pipe-B-eDP-1-size-64: SUCCESS (4.370s)
Starting dynamic subtest: pipe-B-eDP-1-size-128
Dynamic subtest pipe-B-eDP-1-size-128: SUCCESS (3.468s)
Starting dynamic subtest: pipe-B-eDP-1-size-256
Dynamic subtest pipe-B-eDP-1-size-256: SUCCESS (3.469s)
Using (pipe C + eDP-1) to run the subtest.
Starting dynamic subtest: pipe-C-eDP-1-size-64
Dynamic subtest pipe-C-eDP-1-size-64: SUCCESS (4.079s)
Starting dynamic subtest: pipe-C-eDP-1-size-128
Dynamic subtest pipe-C-eDP-1-size-128: SUCCESS (5.015s)
Starting dynamic subtest: pipe-C-eDP-1-size-256
Dynamic subtest pipe-C-eDP-1-size-256: SUCCESS (2.968s)
Subtest viewport: SUCCESS (35.495s)
Stderr
Starting subtest: viewport
Starting dynamic subtest: pipe-A-eDP-1-size-64
Dynamic subtest pipe-A-eDP-1-size-64: SUCCESS (3.499s)
Starting dynamic subtest: pipe-A-eDP-1-size-128
Dynamic subtest pipe-A-eDP-1-size-128: SUCCESS (3.468s)
Starting dynamic subtest: pipe-A-eDP-1-size-256
Dynamic subtest pipe-A-eDP-1-size-256: SUCCESS (3.467s)
Starting dynamic subtest: pipe-B-eDP-1-size-64
Dynamic subtest pipe-B-eDP-1-size-64: SUCCESS (4.370s)
Starting dynamic subtest: pipe-B-eDP-1-size-128
Dynamic subtest pipe-B-eDP-1-size-128: SUCCESS (3.468s)
Starting dynamic subtest: pipe-B-eDP-1-size-256
Dynamic subtest pipe-B-eDP-1-size-256: SUCCESS (3.469s)
Starting dynamic subtest: pipe-C-eDP-1-size-64
Dynamic subtest pipe-C-eDP-1-size-64: SUCCESS (4.079s)
Starting dynamic subtest: pipe-C-eDP-1-size-128
Dynamic subtest pipe-C-eDP-1-size-128: SUCCESS (5.015s)
Starting dynamic subtest: pipe-C-eDP-1-size-256
Dynamic subtest pipe-C-eDP-1-size-256: SUCCESS (2.968s)
Subtest viewport: SUCCESS (35.495s)
Dmesg
<7> [148.104407] xe 0000:00:02.0: [drm:intel_power_well_disable [xe]] disabling DC_off
<7> [148.104552] xe 0000:00:02.0: [drm:skl_enable_dc6 [xe]] Enabling DC6
<7> [148.104621] xe 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [xe]] Setting DC state from 00 to 02
<6> [148.150144] Console: switching to colour dummy device 80x25
<6> [148.150472] [IGT] kms_plane_cursor: executing
<7> [148.158621] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1]
<7> [148.158659] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:198:DP-1]
<7> [148.158824] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1] disconnected
<7> [148.159213] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2]
<7> [148.159234] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:210:DP-2]
<7> [148.159364] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2] disconnected
<7> [148.159724] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3]
<7> [148.159737] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:218:DP-3]
<7> [148.159849] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3] disconnected
<7> [148.160343] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:189:eDP-1]
<7> [148.160359] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:189:eDP-1]
<7> [148.161254] xe 0000:00:02.0: [drm:intel_dp_read_dsc_dpcd [xe]] DSC DPCD: 00 11 00 76 0b 01 01 80 00 01 06 66 08 00 00 00
<7> [148.161351] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000, 810000
<7> [148.161421] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] sink rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 810000
<7> [148.161502] xe 0000:00:02.0: [drm:intel_dp_print_rates [xe]] common rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000, 810000
<7> [148.161617] xe 0000:00:02.0: [drm:update_display_info [drm]] [CONNECTOR:189:eDP-1] Supported Monitor Refresh rate range is 40 Hz - 120 Hz
<7> [148.161667] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.161692] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.161694] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.161715] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.161717] xe 0000:00:02.0: [drm:update_display_info [drm]] [CONNECTOR:189:eDP-1] Assigning EDID-1.4 digital sink color depth as 10 bpc.
<7> [148.161740] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.161761] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.161762] xe 0000:00:02.0: [drm:update_display_info [drm]] [CONNECTOR:189:eDP-1] ELD monitor
<7> [148.161784] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.161804] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.161805] xe 0000:00:02.0: [drm:update_display_info [drm]] [CONNECTOR:189:eDP-1] ELD size 20, SAD count 0
<7> [148.161827] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.161846] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.161885] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] VRR capable: yes
<7> [148.161964] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] DFP max bpc 0, max dotclock 0, TMDS clock 0-0, PCON Max FRL BW 0Gbps
<7> [148.162681] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] PCON ENCODER DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00
<7> [148.162743] xe 0000:00:02.0: [drm:intel_dp_set_edid [xe]] [CONNECTOR:189:eDP-1] RGB->YcbCr conversion? no, YCbCr 4:2:0 allowed? yes, YCbCr 4:4:4->4:2:0 conversion? no
<7> [148.163247] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.163270] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.163271] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.163290] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.163291] [drm:__displayid_iter_next [drm]] base revision 0x13, length 121, 0 0
<5> [148.163309] [drm] DisplayID checksum invalid, remainder is 248
<7> [148.163347] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:189:eDP-1] probed modes:
<7> [148.163365] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] Probed mode: "2880x1800": 60 347710 2880 2928 2960 3040 1800 1803 1809 1906 0x48 0xa
<7> [148.163403] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1]
<7> [148.163415] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:198:DP-1]
<7> [148.163516] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:198:DP-1] disconnected
<7> [148.163539] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2]
<7> [148.163550] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:210:DP-2]
<7> [148.163639] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:210:DP-2] disconnected
<7> [148.163659] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3]
<7> [148.163669] xe 0000:00:02.0: [drm:intel_dp_detect [xe]] [CONNECTOR:218:DP-3]
<7> [148.163755] xe 0000:00:02.0: [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:218:DP-3] disconnected
<6> [148.164069] [IGT] kms_plane_cursor: starting subtest viewport
<6> [148.165114] [IGT] kms_plane_cursor: starting dynamic subtest pipe-A-eDP-1-size-64
<7> [148.165617] xe 0000:00:02.0: [drm:drm_mode_addfb2 [drm]] [FB:228]
<7> [148.186576] xe 0000:00:02.0: [drm:drm_mode_addfb2 [drm]] [FB:229]
<7> [148.198099] xe 0000:00:02.0: [drm:drm_mode_addfb2 [drm]] [FB:230]
<7> [148.207233] xe 0000:00:02.0: [drm:intel_power_well_enable [xe]] enabling DC_off
<7> [148.207422] xe 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [xe]] Setting DC state from 02 to 00
<7> [148.229098] xe 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [xe]] Re-arming FIFO underruns on pipe A
<7> [148.249930] xe 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [xe]] Re-arming FIFO underruns on pipe A
<7> [148.250162] xe 0000:00:02.0: [drm:intel_atomic_check [xe]] [CONNECTOR:189:eDP-1] Limiting display bpp to 24 (EDID bpp 30, max requested bpp 24, max platform bpp 36)
<7> [148.250256] xe 0000:00:02.0: [drm:intel_dp_compute_config_link_bpp_limits [xe]] [ENCODER:188:DDI A/PHY A][CRTC:82:pipe A] DP link limits: pixel clock 347710 kHz DSC off max lanes 4 max rate 810000 max pipe_bpp 24 max link_bpp 24.0000
<7> [148.250330] xe 0000:00:02.0: [drm:intel_dp_compute_link_config [xe]] DP lane count 4 clock 270000 bpp input 24 compressed 0.0000 link rate required 1043130 available 1080000
<7> [148.250399] xe 0000:00:02.0: [drm:intel_psr_compute_config [xe]] PSR2 not enabled because it would inhibit pipe CRC calculation
<7> [148.250457] xe 0000:00:02.0: [drm:intel_atomic_check [xe]] [CRTC:82:pipe A] hw max bpp: 24, pipe bpp: 24, dithering: 0
<7> [148.250527] xe 0000:00:02.0: [drm:intel_ddi_compute_config_late [xe]] [ENCODER:188:DDI A/PHY A] [CRTC:82:pipe A]
<7> [148.250642] xe 0000:00:02.0: [drm] [CRTC:82:pipe A] enable: yes [fastset]
<7> [148.250645] xe 0000:00:02.0: [drm] active: yes, output_types: EDP (0x100), output format: RGB, sink format: RGB
<7> [148.250647] xe 0000:00:02.0: [drm] cpu_transcoder: A, pipe bpp: 24, dithering: 0
<7> [148.250649] xe 0000:00:02.0: [drm] MST master transcoder: <invalid>
<7> [148.250651] xe 0000:00:02.0: [drm] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [148.250653] xe 0000:00:02.0: [drm] bigjoiner: no, pipes: 0x0
<7> [148.250654] xe 0000:00:02.0: [drm] splitter: disabled, link count 0, overlap 0
<7> [148.250656] xe 0000:00:02.0: [drm] dp m_n: lanes: 4; data_m: 8102230, data_n: 8388608, link_m: 675185, link_n: 524288, tu: 64
<7> [148.250659] xe 0000:00:02.0: [drm] dp m2_n2: lanes: 4; data_m: 0, data_n: 0, link_m: 0, link_n: 0, tu: 0
<7> [148.250662] xe 0000:00:02.0: [drm] fec: disabled, enhanced framing: disabled
<7> [148.250663] xe 0000:00:02.0: [drm] sdp split: disabled
<7> [148.250665] xe 0000:00:02.0: [drm] psr: enabled, psr2: disabled, panel replay: disabled, selective fetch: disabled
<7> [148.250667] xe 0000:00:02.0: [drm] framestart delay: 1, MSA timing delay: 0
<7> [148.250668] xe 0000:00:02.0: [drm] audio: 0, infoframes: 0, infoframes enabled: 0x4
<7> [148.250670] xe 0000:00:02.0: [drm] DP SDP: VSC, revision 2, length 8
<7> [148.250672] xe 0000:00:02.0: [drm] pixelformat: RGB
<7> [148.250674] xe 0000:00:02.0: [drm] colorimetry: sRGB
<7> [148.250675] xe 0000:00:02.0: [drm] bpc: 0
<7> [148.250677] xe 0000:00:02.0: [drm] dynamic range: VESA range
<7> [148.250679] xe 0000:00:02.0: [drm] content type: Not defined
<7> [148.250680] xe 0000:00:02.0: [drm] vrr: no, vmin: 1905, vmax: 2859, pipeline full: 0, guardband: 106 flipline: 1906, vmin vblank: 1800, vmax vblank: 2753
<7> [148.250682] xe 0000:00:02.0: [drm] requested mode: "2880x1800": 60 347710 2880 2928 2960 3040 1800 1803 1809 1906 0x48 0xa
<7> [148.250685] xe 0000:00:02.0: [drm] adjusted mode: "2880x1800": 60 347710 2880 2928 2960 3040 1800 1803 1809 1906 0x48 0xa
<7> [148.250687] xe 0000:00:02.0: [drm] crtc timings: clock=347710, hd=2880 hb=2880-3040 hs=2928-2960 ht=3040, vd=1800 vb=1800-1906 vs=1803-1809 vt=1906, flags=0xa
<7> [148.250690] xe 0000:00:02.0: [drm] pipe mode: "2880x1800": 60 347710 2880 2928 2960 3040 1800 1803 1809 1906 0x40 0xa
<7> [148.250692] xe 0000:00:02.0: [drm] crtc timings: clock=347710, hd=2880 hb=2880-3040 hs=2928-2960 ht=3040, vd=1800 vb=1800-1906 vs=1803-1809 vt=1906, flags=0xa
<7> [148.250694] xe 0000:00:02.0: [drm] port clock: 270000, pipe src: 2880x1800+0+0, pixel rate 347710
<7> [148.250696] xe 0000:00:02.0: [drm] linetime: 70, ips linetime: 0
<7> [148.250698] xe 0000:00:02.0: [drm] num_scalers: 2, scaler_users: 0x0, scaler_id: -1, scaling_filter: 0
<7> [148.250700] xe 0000:00:02.0: [drm] pch pfit: 0x0+0+0, disabled, force thru: no
<7> [148.250702] xe 0000:00:02.0: [drm] ips: 0, double wide: 0, drrs: 0
<7> [148.250703] xe 0000:00:02.0: [drm] dpll_hw_state: dpll: 0x41eb0, dpll_md: 0xf42110, fp0: 0xf8, fp1: 0x1000000
<7> [148.250706] xe 0000:00:02.0: [drm] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [148.250707] xe 0000:00:02.0: [drm] pre csc lut: 0 entries, post csc lut: 0 entries
<7> [148.250709] xe 0000:00:02.0: [drm] output csc: pre offsets: 0x0000 0x0000 0x0000
<7> [148.250711] xe 0000:00:02.0: [drm] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250713] xe 0000:00:02.0: [drm] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250715] xe 0000:00:02.0: [drm] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250717] xe 0000:00:02.0: [drm] output csc: post offsets: 0x0000 0x0000 0x0000
<7> [148.250718] xe 0000:00:02.0: [drm] pipe csc: pre offsets: 0x0000 0x0000 0x0000
<7> [148.250720] xe 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250722] xe 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250723] xe 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [148.250724] xe 0000:00:02.0: [drm] pipe csc: post offsets: 0x0000 0x0000 0x0000
<7> [148.250726] xe 0000:00:02.0: [drm] [PLANE:32:plane 1A] fb: [FB:228] 2880x1800 format = XR24 little-endian (0x34325258) modifier = 0x0, visible: yes
<7> [148.250730] xe 0000:00:02.0: [drm] rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [148.250732] xe 0000:00:02.0: [drm] src: 2880.000000x1800.000000+0.000000+0.000000 dst: 2880x1800+0+0
<7> [148.251489] xe 0000:00:02.0: [drm:intel_psr_disable_locked [xe]] Disabling PSR2
<7> [148.278416] xe 0000:00:02.0: [drm:intel_psr_post_plane_update [xe]] Enabling PSR1
<7> [148.279234] xe 0000:00:02.0: [drm:verify_connector_state [xe]] [CONNECTOR:189:eDP-1]
<7> [148.279392] xe 0000:00:02.0: [drm:intel_modeset_verify_crtc [xe]] [CRTC:82:pipe A]
<7> [148.304450] xe 0000:00:02.0: [drm:intel_power_well_disable [xe]] disabling DC_off
<7> [148.304638] xe 0000:00:02.0: [drm:skl_enable_dc6 [xe]] Enabling DC6
<7> [148.304775] xe 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [xe]] Setting DC state from 00 to 02