<7> [589.626170] i915 0000:03:00.0: [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 0
<7> [589.626293] i915 0000:03:00.0: [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 1
<7> [589.626414] i915 0000:03:00.0: [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 2
<7> [589.626541] i915 0000:03:00.0: [drm:verify_single_dpll_state.isra.0 [i915]] DPLL 3
<7> [589.637403] i915 0000:03:00.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A
<6> [589.680905] i915 0000:03:00.0: [drm] GPU HANG: ecode 12:0:00000000
<5> [589.681276] i915 0000:03:00.0: [drm] Resetting chip for stopped heartbeat on bcs0
<7> [589.720889] i915 0000:03:00.0: [drm:skl_update_scaler [i915]] scaler_user index 0.0: staged scaling request for 3840x2160->1920x1080 scaler_users = 0x1
<7> [589.721051] i915 0000:03:00.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4, wm5, wm6, wm7,*twm, swm, stwm
<7> [589.721163] i915 0000:03:00.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] lines 1, 5, 5, 5, 8, 8, 9, 10, 0, 0, 0 -> 1, 17, 19, 20, 29, 0, 0, 0, 0, 0, 0
<7> [589.721274] i915 0000:03:00.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] blocks 31, 156, 156, 156, 249, 249, 280, 311, 45, 0, 0 -> 16, 273, 305, 321, 465, 0, 0, 0, 30, 0, 0
<7> [589.721384] i915 0000:03:00.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb 36, 173, 173, 173, 275, 275, 309, 344, 46, 0, 0 -> 19, 302, 337, 355, 513, 0, 0, 0, 31, 0, 0