igt@i915_pm_rpm@legacy-planes@plane-58 - incomplete -No warnings/errors
<6> [456.356417] [IGT] i915_pm_rpm: starting dynamic subtest plane-58
<7> [456.356486] [drm:drm_mode_setcrtc] [CRTC:80:pipe A]
<7> [456.369110] i915 0000:00:02.0: [drm:intel_runtime_resume [i915]] Resuming device
<7> [456.369421] i915 0000:00:02.0: [drm:bxt_disable_dc9 [i915]] Disabling DC9
<7> [456.370106] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 08 to 00
<7> [456.370666] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 00
<7> [456.371788] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [456.372550] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 19200 kHz, VCO 0 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [456.373159] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Sanitizing cdclk programmed by pre-os