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SSEU status is all 0 on BXT

Submitted by Lionel Landwerlin

Assigned to Intel GFX Bugs mailing list

Link to original bug (#103484)

Description

I have a BXT/APL 2x6 PCIID: 0x5a85

cat /sys/kernel/debug/dri/0/i915_sseu_status
SSEU Device Info
Available Slice Mask: 0001
Available Slice Total: 1
Available Subslice Total: 2
Available Slice0 Subslice Mask: 0006
Available EU Total: 12
Available EU Per Subslice: 6
Has Pooled EU: no
Has Slice Power Gating: no
Has Subslice Power Gating: yes
Has EU Power Gating: yes
SSEU Device Status
Enabled Slice Mask: 0000
Enabled Slice Total: 0
Enabled Subslice Total: 0
Enabled EU Total: 0
Enabled EU Per Subslice: 0

It's not really critical.
I couldn't find anything in the documentation that says we should read the power gating in a different way from other gen9 platforms.
I also verified we actually program the slice/subslice power gating, so it seems like we should get the ack.

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