igt@i915_pm_sseu@full-enable - fail - Failed assertion: *data == spins

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9703/shard-skl4/igt@i915_pm_sseu@full-enable.html

- Err	
- Starting subtest: full-enable
- (i915_pm_sseu:986) CRITICAL: Test assertion failure function gem_check_spin, file ../tests/i915/i915_pm_sseu.c:239:
- (i915_pm_sseu:986) CRITICAL: Failed assertion: *data == spins
- (i915_pm_sseu:986) CRITICAL: error: 0x1 != 0x18bb85e2
- Subtest full-enable failed.
- **** DEBUG ****
- : no
- (i915_pm_sseu:986) DEBUG:   Has Subslice Power Gating: no
- (i915_pm_sseu:986) DEBUG:   Has EU Power Gating: yes
- (i915_pm_sseu:986) DEBUG: SSEU Device Status
- (i915_pm_sseu:986) DEBUG:   Enabled Slice Mask: 0001
- (i915_pm_sseu:986) DEBUG:   Enabled Slice Total: 1
- (i915_pm_sseu:986) DEBUG:   Enabled Subslice Total: 3
- (i915_pm_sseu:986) DEBUG:   Enabled Slice0 subslices: 3
- (i915_pm_sseu:986) DEBUG:   Enabled EU Total: 24
- (i915_pm_sseu:986) DEBUG:   Enabled EU Per Subslice: 8
- (i915_pm_sseu:986) CRITICAL: Test assertion failure function gem_check_spin, file ../tests/i915/i915_pm_sseu.c:239:
- (i915_pm_sseu:986) CRITICAL: Failed assertion: *data == spins
- (i915_pm_sseu:986) CRITICAL: error: 0x1 != 0x18bb85e2
- (i915_pm_sseu:986) igt_core-INFO: Stack trace:
- (i915_pm_sseu:986) igt_core-INFO:   #0 ../lib/igt_core.c:1727 __igt_fail_assert()
- (i915_pm_sseu:986) igt_core-INFO:   #1 [gem_check_spin.isra.1+0x32]
- (i915_pm_sseu:986) igt_core-INFO:   #2 ../tests/i915/i915_pm_sseu.c:367 __real_main379()
- (i915_pm_sseu:986) igt_core-INFO:   #3 ../tests/i915/i915_pm_sseu.c:379 main()
- (i915_pm_sseu:986) igt_core-INFO:   #4 ../csu/libc-start.c:344 __libc_start_main()
- (i915_pm_sseu:986) igt_core-INFO:   #5 [_start+0x2a]
- ****  END  ****
- Subtest full-enable: FAIL (7.017s)