igt@gem_exec_fence@submit(3|67)@rcs0 - incomplete - IPEHR: 0x0e00c002
7> [498.031643] intel_gt_set_wedged [0fe0] 00000000 00000012 00000000 00000013 00000000 00000014 00000000 00000015
<7> [498.031645] intel_gt_set_wedged On hold?: 0
<7> [498.031646] intel_gt_set_wedged MMIO base: 0x00002000
<7> [498.031763] intel_gt_set_wedged EL_STAT_HI: 0x00000020
<7> [498.031767] intel_gt_set_wedged EL_STAT_LO: 0x00082098
<7> [498.031771] intel_gt_set_wedged RING_START: 0x0081e000
<7> [498.031774] intel_gt_set_wedged RING_HEAD: 0x00000058
<7> [498.031778] intel_gt_set_wedged RING_TAIL: 0x00000098
<7> [498.031783] intel_gt_set_wedged RING_CTL: 0x00003401 [waiting]
<7> [498.031789] intel_gt_set_wedged RING_MODE: 0x00000200 [idle]
<7> [498.031792] intel_gt_set_wedged RING_IMR: 0x00000000
<7> [498.031796] intel_gt_set_wedged RING_ESR: 0x00000000
<7> [498.031799] intel_gt_set_wedged RING_EMR: 0xfffffffe
<7> [498.031803] intel_gt_set_wedged RING_EIR: 0x00000000
<7> [498.031811] intel_gt_set_wedged ACTHD: 0x00000000_01800430
<7> [498.031818] intel_gt_set_wedged BBADDR: 0x00000000_01800431
<7> [498.031826] intel_gt_set_wedged DMA_FADDR: 0x00000000_0081e058
<7> [498.031830] intel_gt_set_wedged IPEIR: 0x00000000
<7> [498.031833] intel_gt_set_wedged IPEHR: 0x0e00c002
<7> [498.031835] intel_gt_set_wedged Execlist tasklet queued? no (enabled), preempt? inactive, timeslice? expired
<7> [498.031841] intel_gt_set_wedged Execlist status: 0x00082098 00000020; CSB read:4, write:4, entries:12
<7> [498.031845] intel_gt_set_wedged Active[0]: ccid:00000020, ring:{start:0081e000, hwsp:fedd9000, seqno:00000001, runtime:0ms}, rq: 1fa5:2*- prio=3 @ 120404ms: gem_exec_fence<1944>
<7> [498.031848] intel_gt_set_wedged Active[1]: ccid:00000040, ring:{start:00822000, hwsp:fedd9040, seqno:00000000, runtime:0ms}, rq: 1fa6:2 prio=3 @ 120404ms: gem_exec_fence<1944>
<7> [498.031852] intel_gt_set_wedged E 1fa5:2*- prio=3 @ 120404ms: gem_exec_fence<1944>
<7> [498.031854] intel_gt_set_wedged E 1fa6:2 prio=3 @ 120404ms: gem_exec_fence<1944>
<7> [498.031855] intel_gt_set_wedged Switch priority hint: 3
<7> [498.031857] intel_gt_set_wedged Queue priority hint: 3
<7> [498.031859] intel_gt_set_wedged Q 1fa7:2 prio=3 @ 120403ms: gem_exec_fence<1944>
<7> [498.031861] intel_gt_set_wedged Q 5:527* prio=-4094 @ 565ms: [i915]
<7> [498.031862] intel_gt_set_wedged HWSP:
<7> [498.031864] intel_gt_set_wedged [0000] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [498.031866] intel_gt_set_wedged *
<7> [498.031868] intel_gt_set_wedged [0040] 00008000 00018000 00008005 00008004 00018005 00008004 00008000 00018000
<7> [498.031869] intel_gt_set_wedged [0060] 00008005 00008004 00018005 00008004 00008000 00018000 00008005 00008004
<7> [498.031871] intel_gt_set_wedged [0080] 00018005 00008004 00008000 00018000 00008005 00008004 00018005 00008004
<7> [498.031873] intel_gt_set_wedged [00a0] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 00000004
<7> [498.031875] intel_gt_set_wedged [00c0] 5a5a5a5a 5a5a5a5a 00000000 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [498.031877] intel_gt_set_wedged [00e0] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [498.031878] intel_gt_set_wedged [0100] 00000526 00000000 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [498.031880] intel_gt_set_wedged [0120] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [498.031882] intel_gt_set_wedged *
<7> [498.031884] intel_gt_set_wedged Idle? no
<7> [498.031885] intel_gt_set_wedged Signals:
<7> [498.031898] intel_gt_set_wedged [1fa5:2*] @ 120404ms
<6> [498.032020] [drm] GuC communication disabled
<7> [498.038280] i915 0000:00:02.0: [drm:intel_gt_reset_global [i915]] resetting chip, engines=57
<7> [498.043441] [drm:intel_guc_fw_upload [i915]] GuC status 0x8002f0ec
<6> [498.043544] [drm] GuC communication enabled
<6> [498.046375] i915 0000:00:02.0: [drm] GuC firmware i915/tgl_guc_35.2.0.bin version 35.2 submission:disabled
<6> [498.046378] i915 0000:00:02.0: [drm] HuC firmware i915/tgl_huc_7.0.12.bin version 7.0 authenticated:yes
<6> [498.064145] Console: switching to colour frame buffer device 240x67
<7> [498.079863] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [498.079943] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [498.079998] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [498.080030] i915 0000:00:02.0: [drm:gen9_dc_off_power_well_disable [i915]] Enabling DC3CO
<7> [498.080062] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 40000000
<7> [498.080365] i915 0000:00:02.0: [drm:gen9_disable_dc_states [i915]] Disabling DC3CO
<7> [498.080417] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 40000000 to 00
<7> [498.080689] i915 0000:00:02.0: [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [498.080720] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8442/shard-tglb7/igt_runner22.txt
377.828677] [073/117] (632s left) gem_exec_fence (submit67)
Starting subtest: submit67
Starting dynamic subtest: rcs0
[498.003997] Per-test timeout exceeded. Killing the current test with SIGQUIT.
[498.318453] Closing watchdogs
[498.320079] Initializing watchdogs
[498.320135] /dev/watchdog0