igt@gem_exec_fence@submit - timeslicing, when?
https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5636/shard-tglb6/igt@gem_exec_fence@submit@rcs0.html
<7> [617.400964] intel_gt_set_wedged MMIO base: 0x00002000
<7> [617.402188] intel_gt_set_wedged EL_STAT_HI: 0x00000020
<7> [617.402192] intel_gt_set_wedged EL_STAT_LO: 0x00002098
<7> [617.402196] intel_gt_set_wedged RING_START: 0x00001000
<7> [617.402200] intel_gt_set_wedged RING_HEAD: 0x00000048
<7> [617.402203] intel_gt_set_wedged RING_TAIL: 0x00000090
<7> [617.402209] intel_gt_set_wedged RING_CTL: 0x00003401 [waiting]
<7> [617.402215] intel_gt_set_wedged RING_MODE: 0x00000200 [idle]
<7> [617.402218] intel_gt_set_wedged RING_IMR: 0x00000000
<7> [617.402222] intel_gt_set_wedged RING_ESR: 0x00000000
<7> [617.402225] intel_gt_set_wedged RING_EMR: 0xfffffffe
<7> [617.402229] intel_gt_set_wedged RING_EIR: 0x00000000
<7> [617.402237] intel_gt_set_wedged ACTHD: 0x00000000_01800020
<7> [617.402245] intel_gt_set_wedged BBADDR: 0x00000000_01800021
<7> [617.402253] intel_gt_set_wedged DMA_FADDR: 0x00000000_00001048
<7> [617.402257] intel_gt_set_wedged IPEIR: 0x00000000
<7> [617.402261] intel_gt_set_wedged IPEHR: 0x0e00c002
<7> [617.402263] intel_gt_set_wedged Execlist tasklet queued? no (enabled), preempt? inactive, timeslice? inactive
<7> [617.402269] intel_gt_set_wedged Execlist status: 0x00002098 00000020; CSB read:3, write:3, entries:12
<7> [617.402273] intel_gt_set_wedged Active[0]: ccid:00000020, ring:{start:00001000, hwsp:fffd9000, seqno:00000001, runtime:0ms}, rq: a32:2*- prio=3 @ 120922ms: gem_exec_fence[1606]
<7> [617.402277] intel_gt_set_wedged Active[1]: ccid:00000040, ring:{start:00005000, hwsp:fffd9040, seqno:00000000, runtime:0ms}, rq: a33:2 prio=2 @ 120922ms: gem_exec_fence<1606>
<7> [617.402281] intel_gt_set_wedged E a32:2*- prio=3 @ 120922ms: gem_exec_fence[1606]
<7> [617.402284] intel_gt_set_wedged E a33:2 prio=2 @ 120922ms: gem_exec_fence<1606>
<7> [617.402285] intel_gt_set_wedged HWSP:
<7> [617.402288] intel_gt_set_wedged [0000] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [617.402289] intel_gt_set_wedged *
<7> [617.402291] intel_gt_set_wedged [0040] 00008001 00008005 00018005 00008004 00008000 00018000 00008001 00008005
<7> [617.402293] intel_gt_set_wedged [0060] 00018005 00008004 00008000 00018000 00008001 00008005 00018005 00008004
<7> [617.402295] intel_gt_set_wedged [0080] 00008000 00018000 00008001 00008005 00018005 00008004 00008000 00018000
<7> [617.402297] intel_gt_set_wedged [00a0] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 00000003
<7> [617.402302] intel_gt_set_wedged [00c0] 5a5a5a5a 5a5a5a5a 00000000 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [617.402305] intel_gt_set_wedged [00e0] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [617.402309] intel_gt_set_wedged [0100] 0000019a 00000000 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [617.402311] intel_gt_set_wedged [0120] 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a 5a5a5a5a
<7> [617.402316] intel_gt_set_wedged *
<7> [617.402320] intel_gt_set_wedged Idle? no
<7> [617.402322] intel_gt_set_wedged Signals:
<7> [617.402342] intel_gt_set_wedged [a32:2*] @ 120922ms
<5> [617.403116] i915 0000:00:02.0: [drm] gem_exec_fence[1606] context reset due to GPU hang
<7> [617.404446] i915 0000:00:02.0: [drm:intel_gt_reset_global [i915]] resetting chip, engines=57
<6> [617.409548] Console: switching to colour frame buffer device 240x67
<7> [617.421270] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [617.421351] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [617.421408] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [617.421441] i915 0000:00:02.0: [drm:gen9_dc_off_power_well_disable [i915]] Enabling DC3CO
<7> [617.421505] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 40000000
<7> [617.421717] i915 0000:00:02.0: [drm:gen9_disable_dc_states [i915]] Disabling DC3CO
<7> [617.421751] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 40000000 to 00
<7> [617.422014] i915 0000:00:02.0: [drm:skl_enable_dc6 [i915]] Enabling DC6
<7> [617.422045] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5636/shard-tglb6/igt_runner13.txt
[497.283077] [081/117] (657s left) gem_exec_fence (submit)
Starting subtest: submit
Starting dynamic subtest: rcs0
[617.952735] Per-test timeout exceeded. Killing the current test with SIGQUIT.
[618.263444] Closing watchdogs
[618.264876] Initializing watchdogs
[618.264931] /dev/watchdog0Edited by Chris Wilson