RPL: Dock: Some external monitor can't light up after wake from S5 via WD22TB

[Summary]

Sometimes external monitor can't light up after wake from S5 via WD22TB

[Reproduce Steps]

1. Power off DUT
2. Hook screen to WD22TB via DP port
3. Plug WD22TB into DUT
4. Wait DUT boot into ubuntu

[Results]

Expected: External monitor output correctly
Actual: External monitor did not light up
[Affected monitors]

1. Asus PA27AC

[Additional Information]

BIOS Version: 0.6.51
Kernel Version: Ubuntu 6.0.0-1009-oem/drm-tip: 2023y-01m-05d-13h-04m-16s/drm-tip: 2023y-01m-10d-02h-16m-57s UTC integration manifest

CPU: Raptor Lake i7-1355U

There's a link training error, the rx clock cant recovery so the link training can't go further.

[    4.801489] i915 0000:00:02.0: [drm:intel_dp_dump_link_status [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] ln0_1:0x0 ln2_3:0x0 align:0x0 sink:0x0 adj_req0_1:0x99 adj_req2_3:0x99
[    4.801562] i915 0000:00:02.0: [drm:intel_dp_link_training_clock_recovery [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] Same voltage tried 5 times
[    4.801632] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:254:DP-1][ENCODER:253:DDI TC1/PHY TC1][DPRX] Link Training failed at link rate = 810000, lane count = 4
[    4.802333] i915 0000:00:02.0: [drm] *ERROR* Link Training Unsucces

drm_20230105.txt drm-tip: 2023y-01m-10d-02h-16m-57s UTC integration manifest

changed the description

added Community platform: RPL_P platform: RPL_S labels

@koba There are few fixes went in the upstreaming branch post 6.0, please try with latest drmtip to check if the issue is still reproducible.

@suresh, is this not latest enough?(drm-tip: 2023y-01m-05d-13h-04m-16s)

The logs shows: Linux version 6.0.0-060000rc7-generic

@suresh, i applied the older ubuntu configs on the drmtip. btw i will update it and verify agian.

@suresh i have verified the drmtip(20230109) and got the same errors, "link training failure". I applied the ubuntu config on drmtip so the kernel name isn't associated to "drmtip".

changed the description

@armurthy @ideak Please have a look at the logs.

Hi, Any update on this issue?

@armurthy @ideak Please have a look into the logs.

Might be noteworthy that there's an LTTPR:

[    4.710800] i915 0000:00:02.0: [drm:intel_dp_prepare_link_train.isra.0 [i915]] [ENCODER:253:DDI TC1/PHY TC1] Using LINK_BW_SET value 1e
[    4.711803] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] 8b/10b, lanes: 4, vswing levels: 0/0/0/0, pre-emphasis levels: 0/0/0/0
[    4.711859] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] Using DP training pattern TPS1
[    4.713922] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0
[    4.713977] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0
[    4.715809] i915 0000:00:02.0: [drm:intel_dp_link_training_clock_recovery [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] Clock recovery OK
[    4.716489] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] Using DP training pattern TPS4
[    4.747238] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0
[    4.747307] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0
[    4.779216] i915 0000:00:02.0: [drm:intel_dp_link_training_channel_equalization [i915]] [ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] Channel EQ done. DP Training successful
[    4.779275] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:254:DP-1][ENCODER:253:DDI TC1/PHY TC1][LTTPR 1] Link Training passed at link rate = 810000, lane count = 4
[    4.779644] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 0/0/0/0, pre-emphasis levels: 0/0/0/0
[    4.779702] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] Using DP training pattern TPS1
[    4.782179] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0
[    4.782236] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0
[    4.785033] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1
[    4.785088] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 1/1/1/1
[    4.787882] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2
[    4.787938] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2
[    4.790735] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2
[    4.790795] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2
[    4.793591] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2
[    4.793648] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2
[    4.796121] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2
[    4.796174] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2
[    4.798965] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2
[    4.799017] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2
[    4.801489] i915 0000:00:02.0: [drm:intel_dp_dump_link_status [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] ln0_1:0x0 ln2_3:0x0 align:0x0 sink:0x0 adj_req0_1:0x99 adj_req2_3:0x99
[    4.801562] i915 0000:00:02.0: [drm:intel_dp_link_training_clock_recovery [i915]] [ENCODER:253:DDI TC1/PHY TC1][DPRX] Same voltage tried 5 times
[    4.801632] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:254:DP-1][ENCODER:253:DDI TC1/PHY TC1][DPRX] Link Training failed at link rate = 810000, lane count = 4
[    4.802333] i915 0000:00:02.0: [drm] *ERROR* Link Training Unsuccessful

added feature: display/DP feature: display/USB-C labels

++ @ideak @armurthy

++ @cjechlitschek @neowong-taiwan

added Partner label

changed title from RPL: Dock: Some external monitor can't light up after wake from S5 via WD22TB Edit to RPL: Dock: Some external monitor can't light up after wake from S5 via WD22TB

Upload the logs captured with drm-tip[0], both failed and passed cases for comparison.

dmesg_6.2.0.7z

[0] https://kernel.ubuntu.com/~kernel-ppa/mainline/drm-intel-next/2023-02-10/amd64/

Below is the comment from Canonical:

[ 11.148201] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] Using DP training pattern TPS1 [ 11.150569] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0 [ 11.150899] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0 [ 11.153193] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0 [ 11.153521] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0 [ 11.155891] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 0/0/0/0 [ 11.156067] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 0/0/0/0 [ 11.158132] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1 [ 11.158250] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 1/1/1/1 [ 11.160887] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1 [ 11.161015] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 1/1/1/1 [ 11.162991] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1 [ 11.163099] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 1/1/1/1 [ 11.165140] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1 [ 11.165251] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 2/2/2/2, pre-emphasis levels: 1/1/1/1 [ 11.167282] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2 [ 11.167542] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2 [ 11.169650] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2 [ 11.169739] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2 [ 11.172137] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing request: 1/1/1/1, pre-emphasis request: 2/2/2/2 [ 11.172218] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] 8b/10b, lanes: 4, vswing levels: 1/1/1/1, pre-emphasis levels: 2/2/2/2 [ 11.173656] i915 0000:00:02.0: [drm:intel_dp_dump_link_status [i915]] [ENCODER:262:DDI TC1/PHY TC1][DPRX] ln0_1:0x0 ln2_3:0x0 align:0x0 sink:0x0 adj_req0_1:0x99 adj_req2_3:0x99 [ 11.173730] i915 0000:00:02.0: [drm] *ERROR* [ENCODER:262:DDI TC1/PHY TC1][DPRX] Failed clock recovery 10 times, giving up! [ 11.173731] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:263:DP-2][ENCODER:262:DDI TC1/PHY TC1][DPRX] Link Training failed at link rate = 810000, lane count = 4 [ 11.174350] i915 0000:00:02.0: [drm] *ERROR* Link Training Unsuccessful

Per Synaptics, In aux dump file, we can see the link lost between hub and TBT, so there is no output from source actually but it cannot match what we capture by AUX.

from the drm log, the DP link training failed on DPRX ( tried 10 times). Need Intel helps to further check the log.

Also upload the aux log during the same session kernel_6.2.0-060200.7z

@suresh_kurmi @ideak @armurthy

Would you mind to check the log that customer provided ? They are eager to see the progress, thanks.