<7> [290.637103] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:48:pipe B] fastset mismatch in dpll_hw_state.fp0 (expected 0x00000000, found 0x00040f06)
<7> [290.637219] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:48:pipe B] fastset mismatch in dpll_hw_state.fp1 (expected 0x00000000, found 0x00040f06)
<7> [290.637338] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:48:pipe B] fastset mismatch in hw.adjusted_mode.crtc_clock (expected 0, found 148500)
<7> [290.637452] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:48:pipe B] fastset mismatch in port_clock (expected 0, found 148500)
<7> [290.637633] i915 0000:00:02.0: [drm:intel_plane_calc_min_cdclk [i915]] [PLANE:40:plane B] min cdclk (148500 kHz) > [CRTC:48:pipe B] min cdclk (0 kHz)
<7> [290.637792] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 400000 kHz, actual 400000 kHz
<7> [290.637908] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [290.638189] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe A] enable: no [modeset]
<7> [290.638304] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane A] fb: [NOFB], visible: no
<7> [290.638418] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:35:cursor A] fb: [NOFB], visible: no
<7> [290.638532] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:48:pipe B] enable: yes [modeset]
<7> [290.638646] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: SDVO (0x8), output format: RGB
<7> [290.638760] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
<7> [290.638873] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [290.639009] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x0
<7> [290.639122] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [290.639135] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
<7> [290.639248] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [290.639257] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
<7> [290.639371] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
<7> [290.639485] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
<7> [290.639599] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] linetime: 0, ips linetime: 0
<7> [290.639713] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
<7> [290.639827] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [290.639940] i915 0000:00:02.0: [drm:intel_dpll_dump_hw_state [i915]] dpll_hw_state: dpll: 0xd4010c00, dpll_md: 0x0, fp0: 0x40f06, fp1: 0x40f06
<7> [290.640076] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [290.640190] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder: <invalid>
<7> [290.640306] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane B] fb: [FB:57] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
<7> [290.640420] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1
<7> [290.640535] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [290.640649] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] fb: [NOFB], visible: no
<7> [290.641009] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:50:CRT]
<7> [290.641126] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:51:SDVO B]
<7> [290.641240] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:49:VGA-1]
<7> [290.641404] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 07 01 00 00 00 (SET_IN_OUT_MAP)
<7> [290.646914] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<7> [290.647077] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 11 01 00 (SET_TARGET_OUTPUT)
<5> [290.651731] sd 0:0:0:0: [sda] Starting disk
<7> [290.652314] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.652464] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 16 02 3A 80 18 71 38 2D 40 (SET_OUTPUT_TIMINGS_PART1)
<7> [290.661692] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<6> [290.661704] i915 0000:00:02.0: [drm] Setting output timings on SDVOB failed
<7> [290.661845] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 10 00 (SET_TARGET_INPUT)
<7> [290.666132] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.666276] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 9F 00 (SET_ENCODE)
<7> [290.670552] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<7> [290.670698] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 14 02 3A 80 18 71 38 2D 40 (SET_INPUT_TIMINGS_PART1)
<6> [290.677319] serial 00:02: activated
<7> [290.679943] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.680113] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 15 58 2C 45 00 1E 00 00 00 (SET_INPUT_TIMINGS_PART2)
<7> [290.688132] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.688271] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 21 01 (SET_CLOCK_RATE_MULT)
<7> [290.691690] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.692397] i915 0000:00:02.0: [drm:i965_update_wm [i915]] self-refresh entries: 120, wm: 392
<7> [290.692480] i915 0000:00:02.0: [drm:i965_update_wm [i915]] self-refresh watermark: display plane 392 cursor 32
<7> [290.692561] i915 0000:00:02.0: [drm:i965_update_wm [i915]] Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 392
<7> [290.692679] i915 0000:00:02.0: [drm:intel_enable_pipe [i915]] enabling pipe B
<7> [290.726266] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 03 (GET_TRAINED_INPUTS)
<7> [290.730105] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 01
<7> [290.730255] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 05 01 00 (SET_ACTIVE_OUTPUTS)
<7> [290.734304] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success)
<7> [290.742876] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe A]
<7> [290.743057] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:52:DVI-D-1]
<7> [290.743201] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 04 (GET_ACTIVE_OUTPUTS)
<7> [290.747815] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 01 00
<7> [290.747936] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:48:pipe B]
<7> [290.748117] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 04 (GET_ACTIVE_OUTPUTS)
<7> [290.752715] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 01 00
<7> [290.752856] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 12 (GET_INPUT_TIMINGS_PART1)
<7> [290.764250] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 02 3A 80 18 71 38 2D 40
<7> [290.764399] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 13 (GET_INPUT_TIMINGS_PART2)
<7> [290.774785] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 58 2C 45 00 1E 00 00 00
<7> [290.774927] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 20 (GET_CLOCK_RATE_MULT)
<7> [290.778652] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 01
<7> [290.778790] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 8F (GET_COLORIMETRY)
<7> [290.781567] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<7> [290.781705] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 92 (GET_AUDIO_STAT)
<7> [290.784474] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<7> [290.784613] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 9E (GET_ENCODE)
<7> [290.787323] [drm:intel_sdvo_read_response [i915]] SDVOB: R: ... failed (Not supported)
<7> [290.787662] [drm:drm_helper_hpd_irq_event] [CONNECTOR:49:VGA-1] Old epoch counter 47
<7> [290.787787] i915 0000:00:02.0: [drm:intel_crt_detect [i915]] [CONNECTOR:49:VGA-1] force=0
<6> [290.790282] ACPI: \_SB_.PCI0.IDE1.PRI1.MAS1: docking
<6> [290.790945] OOM killer enabled.
<6> [290.790953] Restarting tasks ...
<7> [290.794442] i915 0000:00:02.0: [drm:intel_crt_detect [i915]] CRT not detected via hotplug
<7> [290.796388] i915 0000:00:02.0: [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
<7> [290.796504] i915 0000:00:02.0: [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus vga] NAK on first message, retry
<7> [290.798995] i915 0000:00:02.0: [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
<7> [290.799055] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
<7> [290.799213] i915 0000:00:02.0: [drm:intel_crt_get_edid [i915]] CRT GMBUS EDID read failed, retry using GPIO bit-banging
<7> [290.799337] i915 0000:00:02.0: [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus vga. force bit now 1
<7> [290.802162] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
<7> [290.802371] i915 0000:00:02.0: [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus vga. force bit now 0
<7> [290.802495] i915 0000:00:02.0: [drm:intel_crt_detect_ddc [i915]] CRT not detected via DDC:0x50 [no valid EDID found]
<7> [290.802519] [drm:drm_helper_hpd_irq_event] [CONNECTOR:49:VGA-1] status updated from disconnected to disconnected
<7> [290.802528] [drm:drm_helper_hpd_irq_event] [CONNECTOR:49:VGA-1] New epoch counter 47
<7> [290.802538] [drm:drm_helper_hpd_irq_event] [CONNECTOR:52:DVI-D-1] Old epoch counter 1
<7> [290.802660] [drm:intel_sdvo_detect [i915]] [CONNECTOR:52:DVI-D-1]
<7> [290.802809] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 0B (GET_ATTACHED_DISPLAYS)
<7> [290.807699] [drm:intel_sdvo_read_response [i915]] SDVOB: R: (Success) 01 00
<7> [290.807815] [drm:intel_sdvo_detect [i915]] SDVO response 1 0 [1]
<7> [290.808019] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 7A 02 (SET_CONTROL_BUS_SWITCH)
<3> [290.812082] ACPI: \_SB_.PCI0.IDE1.PRI1.MAS1: Unable to dock!
<7> [290.817001] [drm:__intel_sdvo_write_cmd [i915]] SDVOB: W: 7A 02 (SET_CONTROL_BUS_SWITCH)
<4> [290.821932] done.
<6> [290.821958] PM: suspend exit
<7> [290.859634] [drm:drm_add_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [290.859646] [drm:drm_add_display_info] non_desktop set to 0
<7> [290.859710] [drm:drm_helper_hpd_irq_event] [CONNECTOR:52:DVI-D-1] status updated from connected to connected
<7> [290.859719] [drm:drm_helper_hpd_irq_event] [CONNECTOR:52:DVI-D-1] New epoch counter 1
<6> [290.925728] ata4: SATA link down (SStatus 4 SControl 300)
<6> [290.926292] ata3: SATA link down (SStatus 4 SControl 300)
<6> [291.237667] ata2.00: SATA link down (SStatus 0 SControl 300)
<6> [291.237686] ata2.01: SATA link down (SStatus 4 SControl 300)
<6> [291.391931] ata1.00: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
<6> [291.391947] ata1.01: SATA link down (SStatus 4 SControl 300)
<6> [291.434411] ata1.00: configured for UDMA/133
<6> [291.504437] PM: suspend entry (deep)
<6> [291.509205] Filesystems sync: 0.004 seconds