<7> [970.217120] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]]
<6> [970.221584] Console: switching to colour dummy device 80x25
<6> [970.221625] [IGT] prime_self_import: executing
<6> [970.225357] [IGT] prime_self_import: starting subtest basic-with_two_bos
<7> [970.419856] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [970.420064] i915 0000:00:02.0: [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [970.429252] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Turn [ENCODER:275:DDI A] panel power off
<7> [970.429451] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Wait for panel power off time
<7> [970.429800] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [970.482825] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [970.482946] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [970.483066] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [970.483173] i915 0000:00:02.0: [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [970.483272] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 91
<7> [970.483397] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [970.483511] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [970.483600] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DDI B]
<7> [970.483808] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:292:DDI D]
<7> [970.483919] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:294:DP-MST A]
<7> [970.484018] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:295:DP-MST B]
<7> [970.484131] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DP-MST C]
<7> [970.484235] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:297:DP-MST D]
<7> [970.484341] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DDI E]
<7> [970.484445] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:302:DP-MST A]
<7> [970.484547] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DP-MST B]
<7> [970.484714] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:304:DP-MST C]
<7> [970.484817] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:305:DP-MST D]
<7> [970.484918] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DDI F]
<7> [970.485018] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST A]
<7> [970.485124] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST B]
<7> [970.485227] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:312:DP-MST C]
<7> [970.485343] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:313:DP-MST D]
<7> [970.485462] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:316:DDI G]
<7> [970.485578] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:318:DP-MST A]
<7> [970.485673] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [970.485823] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [970.485929] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:319:DP-MST B]
<7> [970.486019] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:320:DP-MST C]
<7> [970.486111] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:321:DP-MST D]
<7> [970.486273] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [970.486396] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [970.486526] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [970.486680] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 1
<7> [970.486790] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TBT PLL
<7> [970.486898] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 1
<7> [970.487012] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 2
<7> [970.487126] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 3
<7> [970.487242] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 4
<7> [970.487353] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 5
<7> [970.487462] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 6
<7> [970.487601] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [970.487754] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 91
<7> [970.487855] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [970.488066] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Turn [ENCODER:275:DDI A] panel power on
<7> [970.488208] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [971.092000] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000060
<7> [971.096811] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [971.097075] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Wait for panel power on
<7> [971.097368] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
<7> [971.165117] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [971.165235] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [971.165347] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 20
<7> [971.165603] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [971.308850] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [971.308998] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DDI A IO
<7> [971.309325] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] Turning [ENCODER:275:DDI A] VDD on
<7> [971.309618] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
<7> [971.310851] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Using LINK_RATE_SET value 03
<7> [971.311904] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [971.311997] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [971.312207] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<7> [971.313619] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] clock recovery OK
<7> [971.313740] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS7
<7> [971.315334] [drm:intel_dp_dump_link_status [i915]] ln0_1:0x0 ln2_3:0x0 align:0x80 sink:0x0 adj_req0_1:0x0 adj_req2_3:0x0
<7> [971.315457] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Clock recovery check failed, cannot continue channel equalization
<7> [971.315772] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] [CONNECTOR:276:eDP-1] Link Training failed at link rate = 270000, lane count = 2
<7> [971.315893] i915 0000:00:02.0: [drm:intel_dp_get_link_train_fallback_values [i915]] Retrying Link training for eDP with same parameters
<7> [971.316504] i915 0000:00:02.0: [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [971.316814] i915 0000:00:02.0: [drm:intel_edp_backlight_on [i915]]
<7> [971.316912] i915 0000:00:02.0: [drm:intel_panel_enable_backlight [i915]] pipe A
<7> [971.317051] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
<7> [971.317300] i915 0000:00:02.0: [drm:intel_psr_enable_locked [i915]] Enabling PSR2
<7> [971.318417] i915 0000:00:02.0: [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
<7> [971.325888] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
<7> [971.325947] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [971.328205] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:276:eDP-1]
<7> [971.328309] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [971.328523] i915 0000:00:02.0: [drm:intel_ddi_get_config [i915]] [ENCODER:275:DDI A] Fec status: 0
<7> [971.328671] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [971.329265] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:276:eDP-1]
<6> [971.348409] [IGT] prime_self_import: exiting, ret=0
<7> [971.355232] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:276:eDP-1] Limiting display bpp to 18 instead of EDID bpp 18, requested bpp 36, max platform bpp 36
<7> [971.355275] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max rate 270000 max bpp 18 pixel clock 214000KHz
<7> [971.355307] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] Force DSC en = 0
<7> [971.355338] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP lane count 2 clock 270000 bpp 18
<7> [971.355368] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link rate required 481500 available 540000
<7> [971.355400] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] hw max bpp: 18, pipe bpp: 18, dithering: 1
<7> [971.355436] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:275:DDI A] [CRTC:91:pipe A]
<7> [971.355531] i915 0000:00:02.0: [drm:intel_find_shared_dpll [i915]] [CRTC:91:pipe A] allocated DPLL 0
<7> [971.355576] i915 0000:00:02.0: [drm:intel_reference_shared_dpll.isra.20 [i915]] using DPLL 0 for pipe A
<7> [971.355645] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: yes [modeset]
<7> [971.355685] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: EDP (0x100), output format: RGB
<7> [971.355725] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
<7> [971.355763] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [971.355802] i915 0000:00:02.0: [drm:intel_dump_m_n_config.isra.103 [i915]] dp m_n: lanes: 2; gmch_m: 7479842, gmch_n: 8388608, link_m: 415546, link_n: 524288, tu: 64
<7> [971.355853] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x4
<7> [971.355859] i915 0000:00:02.0: DP SDP: VSC, revision 0, length 0
<7> [971.355864] i915 0000:00:02.0: pixelformat: RGB
<7> [971.355868] i915 0000:00:02.0: colorimetry: sRGB
<7> [971.355872] i915 0000:00:02.0: bpc: 0
<7> [971.355876] i915 0000:00:02.0: dynamic range: VESA range
<7> [971.355879] i915 0000:00:02.0: content type: Not defined
<7> [971.355935] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [971.355945] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [971.355997] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [971.356001] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [971.356040] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] crtc timings: 214000 1920 1936 1952 2104 1080 1083 1097 1128, type: 0x48 flags: 0xa
<7> [971.356078] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 214000
<7> [971.356114] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] linetime: 79, ips linetime: 0
<7> [971.356151] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [971.356187] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] pch pfit: 0x0+0+0, disabled, force thru: no
<7> [971.356223] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [971.356260] i915 0000:00:02.0: [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x88, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0
<7> [971.356296] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [971.356330] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder: <invalid>
<7> [971.356366] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:325] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
<7> [971.356400] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1
<7> [971.356435] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [971.356469] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [971.356503] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [971.356537] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [971.356579] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [971.356632] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [971.356671] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [971.356708] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<7> [971.365663] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [971.375109] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]]
<7> [971.579852] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [971.580072] i915 0000:00:02.0: [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [971.585250] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Turn [ENCODER:275:DDI A] panel power off
<7> [971.585460] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Wait for panel power off time
<7> [971.585844] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [971.638851] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [971.638981] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [971.639109] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [971.639226] i915 0000:00:02.0: [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [971.639331] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 91
<7> [971.639467] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [971.639587] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [971.639774] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DDI B]
<7> [971.639873] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:292:DDI D]
<7> [971.639967] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:294:DP-MST A]
<7> [971.640062] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:295:DP-MST B]
<7> [971.640155] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DP-MST C]
<7> [971.640278] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:297:DP-MST D]
<7> [971.640405] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DDI E]
<7> [971.640527] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:302:DP-MST A]
<7> [971.640662] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DP-MST B]
<7> [971.640846] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:304:DP-MST C]
<7> [971.640966] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:305:DP-MST D]
<7> [971.641080] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DDI F]
<7> [971.641195] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST A]
<7> [971.641286] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST B]
<7> [971.641383] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:312:DP-MST C]
<7> [971.641580] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [971.641685] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [971.641787] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [971.641965] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:313:DP-MST D]
<7> [971.642095] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [971.642184] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:316:DDI G]
<7> [971.642271] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:318:DP-MST A]
<7> [971.642359] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:319:DP-MST B]
<7> [971.642388] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:320:DP-MST C]
<7> [971.642424] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:321:DP-MST D]
<7> [971.642467] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [971.642520] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 1
<7> [971.642561] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TBT PLL
<7> [971.642609] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 1
<7> [971.642654] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 2
<7> [971.642698] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 3
<7> [971.642726] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 4
<7> [971.642755] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 5
<7> [971.642783] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 6
<7> [971.642818] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [971.642849] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 91
<7> [971.642874] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [971.642966] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Turn [ENCODER:275:DDI A] panel power on
<7> [971.643014] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [972.244035] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000060
<7> [972.262838] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [972.263059] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Wait for panel power on
<7> [972.263310] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
<7> [972.331103] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [972.331217] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [972.331330] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 20
<7> [972.331558] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [972.473838] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [972.473987] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DDI A IO
<7> [972.474299] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] Turning [ENCODER:275:DDI A] VDD on
<7> [972.474592] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
<7> [972.475776] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Using LINK_RATE_SET value 03
<7> [972.476789] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [972.476899] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [972.477103] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<7> [972.478373] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] clock recovery OK
<7> [972.478471] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS7
<7> [972.480284] [drm:intel_dp_dump_link_status [i915]] ln0_1:0x0 ln2_3:0x0 align:0x80 sink:0x0 adj_req0_1:0x0 adj_req2_3:0x0
<7> [972.480372] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Clock recovery check failed, cannot continue channel equalization
<7> [972.480698] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] [CONNECTOR:276:eDP-1] Link Training failed at link rate = 270000, lane count = 2
<7> [972.480795] i915 0000:00:02.0: [drm:intel_dp_get_link_train_fallback_values [i915]] Retrying Link training for eDP with same parameters
<7> [972.480921] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:276:eDP-1]
<7> [972.481483] i915 0000:00:02.0: [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [972.481802] i915 0000:00:02.0: [drm:intel_edp_backlight_on [i915]]
<7> [972.481901] i915 0000:00:02.0: [drm:intel_panel_enable_backlight [i915]] pipe A
<7> [972.482038] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
<7> [972.482291] i915 0000:00:02.0: [drm:intel_psr_enable_locked [i915]] Enabling PSR2
<7> [972.483351] i915 0000:00:02.0: [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
<7> [972.491740] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
<7> [972.491836] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [972.493123] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:276:eDP-1]
<7> [972.493228] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [972.493381] i915 0000:00:02.0: [drm:intel_ddi_get_config [i915]] [ENCODER:275:DDI A] Fec status: 0
<7> [972.493456] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [972.493966] i915 0000:00:02.0: [drm:drm_fb_helper_hotplug_event.part.18]
<7> [972.493972] [drm:drm_client_modeset_probe]
<7> [972.494009] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1]
<7> [972.494062] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:276:eDP-1]
<7> [972.494706] i915 0000:00:02.0: [drm:intel_dp_get_dsc_sink_cap [i915]] DSC DPCD: 01 11 01 00 01 00 01 80 00 01 06 00 08 00 00
<7> [972.494751] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] FEC CAPABILITY: 0
<7> [972.495246] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:275:DDI A] MST support: port: no, sink: no, modparam: yes
<7> [972.495291] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000, 648000, 810000
<7> [972.495335] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 216000, 243000, 270000
<7> [972.495377] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] common rates: 162000, 216000, 270000
<7> [972.495394] [drm:drm_dp_get_edid_quirks] DP sink: EDID mfg 06-af prod-ID 2d-43 quirks: 0x0000
<7> [972.495815] [drm:drm_add_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [972.495817] [drm:drm_add_display_info] non_desktop set to 0
<7> [972.495832] [drm:drm_add_edid_modes] ELD: no CEA Extension found
<7> [972.495834] [drm:drm_add_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [972.495837] [drm:drm_add_display_info] non_desktop set to 0
<7> [972.495864] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1] probed modes :
<7> [972.495867] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [972.495870] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 40 214000 1920 1936 1952 2104 1080 1083 1097 2532 0x40 0xa
<7> [972.495872] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:284:HDMI-A-1]
<7> [972.495906] i915 0000:00:02.0: [drm:intel_hdmi_detect [i915]] [CONNECTOR:284:HDMI-A-1]
<7> [972.495935] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:284:HDMI-A-1] disconnected
<7> [972.495937] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:293:DP-1]
<7> [972.495970] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:293:DP-1]
<7> [972.496012] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [972.496053] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [972.496146] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [972.496186] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [972.496191] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:293:DP-1] disconnected
<7> [972.496194] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:301:DP-2]
<7> [972.496224] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:301:DP-2]
<7> [972.496261] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [972.496301] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [972.496388] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [972.496426] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [972.496430] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:301:DP-2] disconnected
<7> [972.496433] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:309:DP-3]
<7> [972.496463] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:309:DP-3]
<7> [972.496499] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [972.496536] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [972.496665] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [972.496702] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [972.496707] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:309:DP-3] disconnected
<7> [972.496710] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:317:DP-4]
<7> [972.496738] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:317:DP-4]
<7> [972.496774] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [972.496815] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [972.496921] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [972.496961] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [972.496965] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:317:DP-4] disconnected
<7> [972.496968] [drm:drm_client_modeset_probe] connector 276 enabled? yes
<7> [972.496970] [drm:drm_client_modeset_probe] connector 284 enabled? no
<7> [972.496972] [drm:drm_client_modeset_probe] connector 293 enabled? no
<7> [972.496974] [drm:drm_client_modeset_probe] connector 301 enabled? no
<7> [972.496976] [drm:drm_client_modeset_probe] connector 309 enabled? no
<7> [972.496978] [drm:drm_client_modeset_probe] connector 317 enabled? no
<7> [972.497007] [drm:drm_client_firmware_config.isra.10] Not using firmware configuration
<7> [972.497014] [drm:drm_client_modeset_probe] looking for cmdline mode on connector 276
<7> [972.497016] [drm:drm_client_modeset_probe] looking for preferred mode on connector 276 0
<7> [972.497018] [drm:drm_client_modeset_probe] found mode 1920x1080
<7> [972.497020] [drm:drm_client_modeset_probe] picking CRTCs for 1920x1080 config
<7> [972.497032] [drm:drm_client_modeset_probe] desired mode 1920x1080 set on crtc 91 (0,0)
<7> [972.497535] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:276:eDP-1] Limiting display bpp to 18 instead of EDID bpp 18, requested bpp 36, max platform bpp 36
<7> [972.497605] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max rate 270000 max bpp 18 pixel clock 214000KHz
<7> [972.497645] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] Force DSC en = 0
<7> [972.497690] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP lane count 2 clock 270000 bpp 18
<7> [972.497728] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link rate required 481500 available 540000
<7> [972.497761] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] hw max bpp: 18, pipe bpp: 18, dithering: 1
<7> [972.497794] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:275:DDI A] [CRTC:91:pipe A]
<7> [972.497889] i915 0000:00:02.0: [drm:intel_find_shared_dpll [i915]] [CRTC:91:pipe A] allocated DPLL 0
<7> [972.497932] i915 0000:00:02.0: [drm:intel_reference_shared_dpll.isra.20 [i915]] using DPLL 0 for pipe A
<7> [972.497978] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: yes [modeset]
<7> [972.498022] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: EDP (0x100), output format: RGB
<7> [972.498064] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
<7> [972.498099] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [972.498130] i915 0000:00:02.0: [drm:intel_dump_m_n_config.isra.103 [i915]] dp m_n: lanes: 2; gmch_m: 7479842, gmch_n: 8388608, link_m: 415546, link_n: 524288, tu: 64
<7> [972.498166] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x4
<7> [972.498170] i915 0000:00:02.0: DP SDP: VSC, revision 0, length 0
<7> [972.498173] i915 0000:00:02.0: pixelformat: RGB
<7> [972.498176] i915 0000:00:02.0: colorimetry: sRGB
<7> [972.498179] i915 0000:00:02.0: bpc: 0
<7> [972.498181] i915 0000:00:02.0: dynamic range: VESA range
<7> [972.498184] i915 0000:00:02.0: content type: Not defined
<7> [972.498226] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [972.498231] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [972.498271] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [972.498276] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [972.498321] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] crtc timings: 214000 1920 1936 1952 2104 1080 1083 1097 1128, type: 0x48 flags: 0xa
<7> [972.498354] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 214000
<7> [972.498384] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] linetime: 79, ips linetime: 0
<7> [972.498413] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [972.498443] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] pch pfit: 0x0+0+0, disabled, force thru: no
<7> [972.498470] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [972.498500] i915 0000:00:02.0: [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x88, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0
<7> [972.498527] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [972.498555] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder: <invalid>
<7> [972.498597] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:325] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
<7> [972.498624] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1
<7> [972.498652] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [972.498680] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [972.498707] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [972.498735] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [972.498761] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [972.498788] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [972.498815] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [972.498843] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<7> [972.508657] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [972.528093] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]]
<7> [972.731908] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [972.732120] i915 0000:00:02.0: [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [972.739288] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Turn [ENCODER:275:DDI A] panel power off
<7> [972.739494] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Wait for panel power off time
<7> [972.739836] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [972.792830] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [972.792950] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [972.793074] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [972.793180] i915 0000:00:02.0: [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [972.793277] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 91
<7> [972.793399] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [972.793514] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [972.793606] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DDI B]
<7> [972.793762] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:292:DDI D]
<7> [972.793853] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:294:DP-MST A]
<7> [972.793942] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:295:DP-MST B]
<7> [972.794027] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DP-MST C]
<7> [972.794111] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:297:DP-MST D]
<7> [972.794194] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DDI E]
<7> [972.794277] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:302:DP-MST A]
<7> [972.794356] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DP-MST B]
<7> [972.794438] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:304:DP-MST C]
<7> [972.794523] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:305:DP-MST D]
<7> [972.794611] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DDI F]
<7> [972.794736] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST A]
<7> [972.794835] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST B]
<7> [972.794930] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:312:DP-MST C]
<7> [972.795020] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:313:DP-MST D]
<7> [972.795111] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:316:DDI G]
<7> [972.795198] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:318:DP-MST A]
<7> [972.795286] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:319:DP-MST B]
<7> [972.795373] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:320:DP-MST C]
<7> [972.795462] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:321:DP-MST D]
<7> [972.795640] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [972.795734] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [972.795826] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [972.796009] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [972.796152] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [972.796264] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 1
<7> [972.796366] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TBT PLL
<7> [972.796460] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 1
<7> [972.796502] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 2
<7> [972.796548] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 3
<7> [972.796622] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 4
<7> [972.796664] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 5
<7> [972.796712] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 6
<7> [972.796768] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [972.796809] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 91
<7> [972.796839] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [972.796925] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Turn [ENCODER:275:DDI A] panel power on
<7> [972.796970] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [973.396008] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
<7> [973.396156] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [973.396348] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Wait for panel power on
<7> [973.396590] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
<7> [973.464442] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [973.464558] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [973.464674] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 20
<7> [973.464886] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [973.607842] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [973.607992] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DDI A IO
<7> [973.608318] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] Turning [ENCODER:275:DDI A] VDD on
<7> [973.608609] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
<7> [973.609720] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Using LINK_RATE_SET value 03
<7> [973.610762] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [973.610852] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [973.611055] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<7> [973.612326] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] clock recovery OK
<7> [973.612421] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS7
<7> [973.614281] [drm:intel_dp_dump_link_status [i915]] ln0_1:0x0 ln2_3:0x0 align:0x80 sink:0x0 adj_req0_1:0x0 adj_req2_3:0x0
<7> [973.614370] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Clock recovery check failed, cannot continue channel equalization
<7> [973.614689] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] [CONNECTOR:276:eDP-1] Link Training failed at link rate = 270000, lane count = 2
<7> [973.614790] i915 0000:00:02.0: [drm:intel_dp_get_link_train_fallback_values [i915]] Retrying Link training for eDP with same parameters
<7> [973.615337] i915 0000:00:02.0: [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [973.615602] i915 0000:00:02.0: [drm:intel_edp_backlight_on [i915]]
<7> [973.615749] i915 0000:00:02.0: [drm:intel_panel_enable_backlight [i915]] pipe A
<7> [973.615891] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
<7> [973.616144] i915 0000:00:02.0: [drm:intel_psr_enable_locked [i915]] Enabling PSR2
<7> [973.617306] i915 0000:00:02.0: [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
<7> [973.625709] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
<7> [973.625765] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [973.626902] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:276:eDP-1]
<7> [973.626990] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [973.627149] i915 0000:00:02.0: [drm:intel_ddi_get_config [i915]] [ENCODER:275:DDI A] Fec status: 0
<7> [973.627229] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [973.627712] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:276:eDP-1]
<7> [973.627717] i915 0000:00:02.0: [drm:drm_fb_helper_hotplug_event.part.18]
<7> [973.627721] [drm:drm_client_modeset_probe]
<7> [973.627780] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1]
<7> [973.627845] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:276:eDP-1]
<7> [973.628491] i915 0000:00:02.0: [drm:intel_dp_get_dsc_sink_cap [i915]] DSC DPCD: 01 11 01 00 01 00 01 80 00 01 06 00 08 00 00
<7> [973.628545] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] FEC CAPABILITY: 0
<7> [973.629032] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:275:DDI A] MST support: port: no, sink: no, modparam: yes
<7> [973.629065] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000, 648000, 810000
<7> [973.629097] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 216000, 243000, 270000
<7> [973.629128] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] common rates: 162000, 216000, 270000
<7> [973.629141] [drm:drm_dp_get_edid_quirks] DP sink: EDID mfg 06-af prod-ID 2d-43 quirks: 0x0000
<7> [973.629518] [drm:drm_add_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [973.629520] [drm:drm_add_display_info] non_desktop set to 0
<7> [973.629536] [drm:drm_add_edid_modes] ELD: no CEA Extension found
<7> [973.629538] [drm:drm_add_display_info] Supported Monitor Refresh rate range is 0 Hz - 0 Hz
<7> [973.629540] [drm:drm_add_display_info] non_desktop set to 0
<7> [973.629600] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:276:eDP-1] probed modes :
<7> [973.629603] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [973.629605] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 40 214000 1920 1936 1952 2104 1080 1083 1097 2532 0x40 0xa
<7> [973.629608] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:284:HDMI-A-1]
<7> [973.629640] i915 0000:00:02.0: [drm:intel_hdmi_detect [i915]] [CONNECTOR:284:HDMI-A-1]
<7> [973.629669] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:284:HDMI-A-1] disconnected
<7> [973.629672] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:293:DP-1]
<7> [973.629705] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:293:DP-1]
<7> [973.629748] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [973.629793] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [973.629887] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [973.629928] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [973.629933] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:293:DP-1] disconnected
<7> [973.629935] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:301:DP-2]
<7> [973.629967] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:301:DP-2]
<7> [973.630005] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [973.630048] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [973.630156] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [973.630194] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [973.630199] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:301:DP-2] disconnected
<7> [973.630201] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:309:DP-3]
<7> [973.630232] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:309:DP-3]
<7> [973.630268] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [973.630307] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [973.630415] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [973.630453] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [973.630457] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:309:DP-3] disconnected
<7> [973.630460] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:317:DP-4]
<7> [973.630489] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:317:DP-4]
<7> [973.630526] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling TC cold off
<7> [973.630569] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold block succeeded
<7> [973.630712] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling TC cold off
<7> [973.630751] i915 0000:00:02.0: [drm:tgl_tc_cold_request [i915]] TC cold unblock succeeded
<7> [973.630756] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:317:DP-4] disconnected
<7> [973.630759] [drm:drm_client_modeset_probe] connector 276 enabled? yes
<7> [973.630761] [drm:drm_client_modeset_probe] connector 284 enabled? no
<7> [973.630763] [drm:drm_client_modeset_probe] connector 293 enabled? no
<7> [973.630765] [drm:drm_client_modeset_probe] connector 301 enabled? no
<7> [973.630766] [drm:drm_client_modeset_probe] connector 309 enabled? no
<7> [973.630768] [drm:drm_client_modeset_probe] connector 317 enabled? no
<7> [973.630796] [drm:drm_client_firmware_config.isra.10] Not using firmware configuration
<7> [973.630804] [drm:drm_client_modeset_probe] looking for cmdline mode on connector 276
<7> [973.630806] [drm:drm_client_modeset_probe] looking for preferred mode on connector 276 0
<7> [973.630808] [drm:drm_client_modeset_probe] found mode 1920x1080
<7> [973.630810] [drm:drm_client_modeset_probe] picking CRTCs for 1920x1080 config
<7> [973.630824] [drm:drm_client_modeset_probe] desired mode 1920x1080 set on crtc 91 (0,0)
<7> [973.631289] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:276:eDP-1] Limiting display bpp to 18 instead of EDID bpp 18, requested bpp 36, max platform bpp 36
<7> [973.631325] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max rate 270000 max bpp 18 pixel clock 214000KHz
<7> [973.631357] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] Force DSC en = 0
<7> [973.631387] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP lane count 2 clock 270000 bpp 18
<7> [973.631419] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link rate required 481500 available 540000
<7> [973.631449] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] hw max bpp: 18, pipe bpp: 18, dithering: 1
<7> [973.631479] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:275:DDI A] [CRTC:91:pipe A]
<7> [973.631564] i915 0000:00:02.0: [drm:intel_find_shared_dpll [i915]] [CRTC:91:pipe A] allocated DPLL 0
<7> [973.631618] i915 0000:00:02.0: [drm:intel_reference_shared_dpll.isra.20 [i915]] using DPLL 0 for pipe A
<7> [973.631658] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: yes [modeset]
<7> [973.631693] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: EDP (0x100), output format: RGB
<7> [973.631727] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
<7> [973.631759] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [973.631792] i915 0000:00:02.0: [drm:intel_dump_m_n_config.isra.103 [i915]] dp m_n: lanes: 2; gmch_m: 7479842, gmch_n: 8388608, link_m: 415546, link_n: 524288, tu: 64
<7> [973.631833] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x4
<7> [973.631837] i915 0000:00:02.0: DP SDP: VSC, revision 0, length 0
<7> [973.631840] i915 0000:00:02.0: pixelformat: RGB
<7> [973.631842] i915 0000:00:02.0: colorimetry: sRGB
<7> [973.631844] i915 0000:00:02.0: bpc: 0
<7> [973.631846] i915 0000:00:02.0: dynamic range: VESA range
<7> [973.631847] i915 0000:00:02.0: content type: Not defined
<7> [973.631875] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] requested mode:
<7> [973.631878] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [973.631906] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] adjusted mode:
<7> [973.631908] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 90 214000 1920 1936 1952 2104 1080 1083 1097 1128 0x48 0xa
<7> [973.631935] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] crtc timings: 214000 1920 1936 1952 2104 1080 1083 1097 1128, type: 0x48 flags: 0xa
<7> [973.631963] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 214000
<7> [973.631989] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] linetime: 79, ips linetime: 0
<7> [973.632016] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
<7> [973.632043] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] pch pfit: 0x0+0+0, disabled, force thru: no
<7> [973.632069] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
<7> [973.632096] i915 0000:00:02.0: [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x88, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0
<7> [973.632123] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [973.632149] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder: <invalid>
<7> [973.632176] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:325] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes
<7> [973.632202] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1
<7> [973.632228] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0
<7> [973.632254] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2A] fb: [NOFB], visible: no
<7> [973.632279] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 3A] fb: [NOFB], visible: no
<7> [973.632305] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:55:plane 4A] fb: [NOFB], visible: no
<7> [973.632330] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 5A] fb: [NOFB], visible: no
<7> [973.632356] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:71:plane 6A] fb: [NOFB], visible: no
<7> [973.632381] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:79:plane 7A] fb: [NOFB], visible: no
<7> [973.632407] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:87:cursor A] fb: [NOFB], visible: no
<7> [973.640396] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [973.661084] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]]
<7> [973.867841] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [973.868057] i915 0000:00:02.0: [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [973.873858] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Turn [ENCODER:275:DDI A] panel power off
<7> [973.874066] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.52 [i915]] Wait for panel power off time
<7> [973.874313] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [973.927797] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [973.927919] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [973.928040] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [973.928148] i915 0000:00:02.0: [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [973.928245] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 91
<7> [973.928367] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [973.928485] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:275:DDI A]
<7> [973.928572] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:283:DDI B]
<7> [973.928741] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:292:DDI D]
<7> [973.928827] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:294:DP-MST A]
<7> [973.928914] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:295:DP-MST B]
<7> [973.929001] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:296:DP-MST C]
<7> [973.929088] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:297:DP-MST D]
<7> [973.929169] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:300:DDI E]
<7> [973.929256] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:302:DP-MST A]
<7> [973.929342] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:303:DP-MST B]
<7> [973.929425] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:304:DP-MST C]
<7> [973.929510] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:305:DP-MST D]
<7> [973.929598] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:308:DDI F]
<7> [973.929717] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:310:DP-MST A]
<7> [973.929816] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:311:DP-MST B]
<7> [973.929911] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:312:DP-MST C]
<7> [973.930029] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:313:DP-MST D]
<7> [973.930163] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:316:DDI G]
<7> [973.930232] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [973.930362] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [973.930456] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:318:DP-MST A]
<7> [973.930582] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [973.930700] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:319:DP-MST B]
<7> [973.930881] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:320:DP-MST C]
<7> [973.931010] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [973.931104] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:321:DP-MST D]
<7> [973.931208] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 0
<7> [973.931335] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] DPLL 1
<7> [973.931449] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TBT PLL
<7> [973.931560] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 1
<7> [973.931704] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 2
<7> [973.931819] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 3
<7> [973.931937] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 4
<7> [973.932053] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 5
<7> [973.932167] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.147 [i915]] TC PLL 6
<7> [973.932299] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [973.932417] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 91
<7> [973.932517] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
<7> [973.932738] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Turn [ENCODER:275:DDI A] panel power on
<7> [973.932873] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<7> [974.548029] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
<7> [974.548176] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [974.548371] i915 0000:00:02.0: [drm:edp_panel_on [i915]] Wait for panel power on
<7> [974.548612] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
<7> [974.616428] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000088a, pins 0x00000010, long 0x00000010
<7> [974.616535] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:275:DDI A] - long
<7> [974.616652] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 20
<7> [974.616851] i915 0000:00:02.0: [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP [ENCODER:275:DDI A]
<7> [974.759848] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [974.760014] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DDI A IO
<7> [974.760370] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] Turning [ENCODER:275:DDI A] VDD on
<7> [974.760805] i915 0000:00:02.0: [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
<7> [974.762871] i915 0000:00:02.0: [drm:intel_dp_start_link_train [i915]] Using LINK_RATE_SET value 03
<7> [974.764358] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
<7> [974.764395] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
<7> [974.764487] i915 0000:00:02.0: [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
<3> [974.769098] i915 0000:00:02.0: [drm] *ERROR* AUX A/port A: receive error (status 0x6f4003ff)
<3> [974.773555] i915 0000:00:02.0: [drm] *ERROR* AUX A/port A: receive error (status 0x6f4003ff)
<3> [974.778095] i915 0000:00:02.0: [drm] *ERROR* AUX A/port A: receive error (status 0x6f4003ff)
<3> [974.782555] i915 0000:00:02.0: [drm] *ERROR* AUX A/port A: receive error (status 0x6f4003ff)